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authorFred Reitberger <reitbergerfred@gmail.com>2022-10-21 15:09:13 -0400
committerFelix Held <felix-coreboot@felixheld.de>2022-10-22 01:59:00 +0000
commit81b5631258a99365a17d5ea144bc7407d2e33975 (patch)
tree7bc8e33d8d450a8a797e3cf9a0b5f98bb1e4cce9 /src/soc/amd/cezanne/include
parentec929142c6975c63aeb2213f0e01633f69744061 (diff)
soc/amd/*/i2c.h: Make definition more accurate
Make GPIO_I2C_MASK macro more accurate by using the GPIO_I2Cx_SCL definitions instead of BIT(x). Signed-off-by: Fred Reitberger <reitbergerfred@gmail.com> Change-Id: I13fc376552068a64768fe1cf9f1c09cca1768aed Reviewed-on: https://review.coreboot.org/c/coreboot/+/68682 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Matt DeVillier <matt.devillier@amd.corp-partner.google.com> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Diffstat (limited to 'src/soc/amd/cezanne/include')
-rw-r--r--src/soc/amd/cezanne/include/soc/i2c.h3
1 files changed, 2 insertions, 1 deletions
diff --git a/src/soc/amd/cezanne/include/soc/i2c.h b/src/soc/amd/cezanne/include/soc/i2c.h
index c0e3e800bb..fa7a5e41b5 100644
--- a/src/soc/amd/cezanne/include/soc/i2c.h
+++ b/src/soc/amd/cezanne/include/soc/i2c.h
@@ -10,7 +10,8 @@
#define GPIO_I2C1_SCL BIT(1)
#define GPIO_I2C2_SCL BIT(2)
#define GPIO_I2C3_SCL BIT(3)
-#define GPIO_I2C_MASK (BIT(0) | BIT(1) | BIT(2) | BIT(3))
+#define GPIO_I2C_MASK (GPIO_I2C0_SCL | GPIO_I2C1_SCL | \
+ GPIO_I2C2_SCL | GPIO_I2C3_SCL)
#define I2C0_SCL_PIN GPIO_145