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authorKangheui Won <khwon@chromium.org>2021-04-20 17:46:37 +1000
committerFelix Held <felix-coreboot@felixheld.de>2021-04-28 16:06:44 +0000
commit68de80838cb5e5add22daeebb0409233961177c3 (patch)
tree14d6f16b1a7edace48b5219cdd7992f6c116dd04 /src/soc/amd/cezanne/include
parent66c5f258be39adae0842fb4333418179996356b7 (diff)
soc/amd/cezanne: copy psp_transfer.h from picasso
Cezanne version of psp_transfer.h lacks some necessary definitions. Currently we don't have any plan to change transfer buffer structure in cezanne, so just copy'em over. Signed-off-by: Kangheui Won <khwon@chromium.org> Change-Id: I9361c4ab76c8ded06358a7718d5e447c16414721 Reviewed-on: https://review.coreboot.org/c/coreboot/+/52540 Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com> Reviewed-by: Raul Rangel <rrangel@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/amd/cezanne/include')
-rw-r--r--src/soc/amd/cezanne/include/soc/psp_transfer.h49
1 files changed, 49 insertions, 0 deletions
diff --git a/src/soc/amd/cezanne/include/soc/psp_transfer.h b/src/soc/amd/cezanne/include/soc/psp_transfer.h
index f5cd427d4c..96cdae192f 100644
--- a/src/soc/amd/cezanne/include/soc/psp_transfer.h
+++ b/src/soc/amd/cezanne/include/soc/psp_transfer.h
@@ -3,7 +3,56 @@
#ifndef AMD_CEZANNE_PSP_TRANSFER_H
#define AMD_CEZANNE_PSP_TRANSFER_H
+# if (CONFIG_CMOS_RECOVERY_BYTE != 0)
+# define CMOS_RECOVERY_BYTE CONFIG_CMOS_RECOVERY_BYTE
+# elif CONFIG(VBOOT_STARTS_BEFORE_BOOTBLOCK)
+# error "Must set CONFIG_CMOS_RECOVERY_BYTE"
+# endif
+
+#define CMOS_RECOVERY_MAGIC_VAL 0x96
+
#define TRANSFER_INFO_SIZE 64
#define TIMESTAMP_BUFFER_SIZE 0x200
+#define TRANSFER_MAGIC_VAL 0x50544953
+
+/* Bit definitions for the psp_info field in the PSP transfer_info_struct */
+#define PSP_INFO_PRODUCTION_MODE 0x00000001UL
+#define PSP_INFO_PRODUCTION_SILICON 0x00000002UL
+#define PSP_INFO_VALID 0x80000000UL
+
+/* Area for things that would cause errors in a linker script */
+#if !defined(__ASSEMBLER__)
+#include <stdint.h>
+
+struct transfer_info_struct {
+ uint32_t magic_val; /* Identifier */
+ uint32_t struct_bytes; /* Size of this structure */
+ uint32_t buffer_size; /* Size of the transfer buffer area */
+
+ /* Offsets from start of transfer buffer */
+ uint32_t workbuf_offset;
+ uint32_t console_offset;
+ uint32_t timestamp_offset;
+ uint32_t fmap_offset;
+
+ uint32_t unused1[5];
+
+ /* Fields reserved for the PSP */
+ uint64_t timestamp; /* Offset 0x30 */
+ uint32_t psp_unused; /* Offset 0x38 */
+ uint32_t psp_info; /* Offset 0x3C */
+};
+
+_Static_assert(sizeof(struct transfer_info_struct) == TRANSFER_INFO_SIZE,
+ "TRANSFER_INFO_SIZE is incorrect");
+
+/* Make sure the PSP transferred information over to x86 side. */
+void verify_psp_transfer_buf(void);
+/* Display the transfer block's PSP_info data */
+void show_psp_transfer_info(void);
+/* Called by bootblock_c_entry in the VBOOT_STARTS_BEFORE_BOOTBLOCK case */
+void boot_with_psp_timestamp(uint64_t base_timestamp);
+
+#endif
#endif /* AMD_CEZANNE_PSP_TRANSFER_H */