diff options
| author | Felix Held <felix-coreboot@felixheld.de> | 2023-08-03 00:10:03 +0200 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2023-08-08 19:40:59 +0000 |
| commit | 18a3c230ff4ab06dda46ebac9902d198721909d9 (patch) | |
| tree | b30973e53cc052fbf9ca7285862ca6e717852aa2 /src/soc/amd/cezanne/include | |
| parent | 8677d2ddb82e79330e24e1355ab4fbe3360aad1a (diff) | |
soc/amd/common/include/data_fabric_defs: introduce & use DF_REG_* macros
To have both the PCI function number and the register offset into the
config space of that function of the data fabric device in the data
fabric register definitions, introduce and use the DF_REG_ID, DF_REG_FN
and DF_REG_REG macros. The DF_REG_ID macro is used for register
definitions where both the function number and the register offset are
specified, and the DF_REG_FN and DF_REG_REG macros are used to extract
the function number and the register offset from the register defines.
This will allow having one define for accessing an indexed group of
registers that are on different functions of the data fabric device.
TEST=MMIO resources read from the data fabric's MMIO decode registers
don't change on Mandolin and the ACPI CRAT table is also identical.
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: I63a284b26081c170a217b082b100c482f6158e7e
Reviewed-on: https://review.coreboot.org/c/coreboot/+/76886
Reviewed-by: Martin L Roth <gaumless@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Diffstat (limited to 'src/soc/amd/cezanne/include')
| -rw-r--r-- | src/soc/amd/cezanne/include/soc/data_fabric.h | 13 |
1 files changed, 7 insertions, 6 deletions
diff --git a/src/soc/amd/cezanne/include/soc/data_fabric.h b/src/soc/amd/cezanne/include/soc/data_fabric.h index 3b1f588ec6..100529e5fb 100644 --- a/src/soc/amd/cezanne/include/soc/data_fabric.h +++ b/src/soc/amd/cezanne/include/soc/data_fabric.h @@ -3,20 +3,21 @@ #ifndef AMD_CEZANNE_DATA_FABRIC_H #define AMD_CEZANNE_DATA_FABRIC_H +#include <amdblocks/data_fabric_defs.h> #include <types.h> /* D18F0 - Fabric Configuration registers */ -#define D18F0_MMIO_BASE0 0x200 -#define D18F0_MMIO_LIMIT0 0x204 +#define D18F0_MMIO_BASE0 DF_REG_ID(0, 0x200) +#define D18F0_MMIO_LIMIT0 DF_REG_ID(0, 0x204) #define D18F0_MMIO_SHIFT 16 -#define D18F0_MMIO_CTRL0 0x208 +#define D18F0_MMIO_CTRL0 DF_REG_ID(0, 0x208) #define DF_MMIO_REG_SET_SIZE 4 #define DF_MMIO_REG_SET_COUNT 8 -#define DF_FICAA_BIOS 0x5C -#define DF_FICAD_LO 0x98 -#define DF_FICAD_HI 0x9C +#define DF_FICAA_BIOS DF_REG_ID(4, 0x5C) +#define DF_FICAD_LO DF_REG_ID(4, 0x98) +#define DF_FICAD_HI DF_REG_ID(4, 0x9C) #define IOMS0_FABRIC_ID 10 |