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author | Mario Scheithauer <mario.scheithauer@siemens.com> | 2024-01-26 11:12:29 +0100 |
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committer | Felix Held <felix-coreboot@felixheld.de> | 2024-01-27 14:18:46 +0000 |
commit | 0458a4428d2f7acc44a73f5cf417fa0e0e7d669b (patch) | |
tree | 8cda36ea78aabbab848a77fec1a3d0e60d159203 /src/soc/amd/cezanne/include | |
parent | 35446d5551934e313c1eed15459430a3fe1a9a34 (diff) |
mb/siemens/mc_ehl5: Set LVDS re-power delay to 1 s
The currently used panel type could work with 500 ms but increasing
the value to 1 second allows to use a wider range of LVDS LCD panels,
as many of them specify the delay of 1 s as minimum.
The patch has already been made for mc_ehl3 and serves the purpose of
standardization.
commit c0221aa980d3 ("mb/siemens/mc_ehl3/lcd_panel.c: Set LVDS re-power
delay to 1 s")
Change-Id: Ife26ff27b41298ceeed7d9aed0c1ae5553ab5ff8
Signed-off-by: Mario Scheithauer <mario.scheithauer@siemens.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/80214
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Jan Samek <jan.samek@siemens.com>
Diffstat (limited to 'src/soc/amd/cezanne/include')
0 files changed, 0 insertions, 0 deletions