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authorFelix Held <felix-coreboot@felixheld.de>2024-01-30 18:42:38 +0100
committerFelix Held <felix-coreboot@felixheld.de>2024-02-01 11:39:46 +0000
commit31ca978c23b6760804589205348905319669cc3e (patch)
treed089268c0db8c30718b78ee983727ad58e4d8d87 /src/soc/amd/cezanne/fw.cfg
parentf9fb10861064485dd39954810347b0662dbd1f87 (diff)
soc/amd: factor out memmap from root_complex
Now that the SoC-specific memory map is reported on the domain device instead of the northbridge device, factor out the read_soc_memmap_resources function from root_complex.c to new memmap.c file. For now each SoC still has its own memmap.c file, but the plan is to eventually have a common implementation that works for all AMD family 17h+ SoCs. For that I'll still need to look closer into the differences between the FSP and the openSIL integration though. Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Change-Id: Ifd7659e9a55de9df24118b6d6c885a21dc6f14a9 Reviewed-on: https://review.coreboot.org/c/coreboot/+/80272 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Diffstat (limited to 'src/soc/amd/cezanne/fw.cfg')
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