diff options
| author | Karthikeyan Ramasubramanian <kramasub@google.com> | 2021-07-28 23:53:20 -0600 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2021-08-30 18:53:34 +0000 |
| commit | 0032bfa5c5f93d3530fee90a021829db79b328f1 (patch) | |
| tree | d29344309a53fbd571c60771948eb12944a1182d /src/soc/amd/cezanne/early_fch.c | |
| parent | b5b1c5a7da72a21e09f6476172c5ff0068b13f7d (diff) | |
soc/amd/cezanne/early_fch: Perform early SPI initialization
Add the fch_spi_early_init call in fch_pre_init to perform early SPI
initialization which enables SPI ROM and setting the speed & read modes.
BUG=b:194919326
TEST=Build and boot to OS in Guybrush.
Change-Id: Ibfbe6e16bd6b0dd46c13cecf2a35f0c0b4576b88
Signed-off-by: Karthikeyan Ramasubramanian <kramasub@google.com>
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/56684
Reviewed-by: Martin Roth <martinroth@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/amd/cezanne/early_fch.c')
| -rw-r--r-- | src/soc/amd/cezanne/early_fch.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/soc/amd/cezanne/early_fch.c b/src/soc/amd/cezanne/early_fch.c index 5d268bcbab..9da154cd2b 100644 --- a/src/soc/amd/cezanne/early_fch.c +++ b/src/soc/amd/cezanne/early_fch.c @@ -44,7 +44,7 @@ void configure_port80_routing_early(void) void fch_pre_init(void) { lpc_early_init(); - + fch_spi_early_init(); enable_acpimmio_decode_pm04(); fch_smbus_init(); fch_enable_cf9_io(); |