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authorFelix Held <felix.held@amd.corp-partner.google.com>2021-09-20 16:31:33 +0200
committerFelix Held <felix-coreboot@felixheld.de>2021-10-13 17:36:53 +0000
commit425e73d3f545430884ad2020d56300aae88a1714 (patch)
tree675aaa7ead897406d8a725699685e1070d1503d1 /src/soc/amd/cezanne/cppc.c
parentef90f07d065156f911aa29eac98ea394f4d776c4 (diff)
soc/amd/*: Enable ACPIMMIO decode first in fch_pre_init
Since the GPIO mux/control MMIO regions are within the ACPIMMIO region, we need to call enable_acpimmio_decode_pm04 here first so that accessing the GPIO registers will work. BUG=None TEST=Build and boot to OS in Guybrush. Change-Id: I4bc076261c72cf999a5f2464b74cff6bf694d473 Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Signed-off-by: Karthikeyan Ramasubramanian <kramasub@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/57782 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Raul Rangel <rrangel@chromium.org>
Diffstat (limited to 'src/soc/amd/cezanne/cppc.c')
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