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| author | Felix Held <felix-coreboot@felixheld.de> | 2021-01-12 23:44:05 +0100 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2021-01-14 15:00:55 +0000 |
| commit | 91ef92525d8a9a0e83be8d91eb5e83b1cab58008 (patch) | |
| tree | 15f519bee3a44bbb2a462a3667ea31a30259d274 /src/soc/amd/cezanne/chip.c | |
| parent | 6f9ed7a10dfb8763a13f09d65c7faa36b3bacd64 (diff) | |
soc/amd/stoneyridge: use SOC_AMD_COMMON_BLOCK_UART
Since the functions that get called by the coreboot console
initialization code aren't in the SOC-specific code anymore, the SOC's
uart.c can be included unconditionally in the build now. This also
replaces the STONEYRIDGE_UART Kconfig option with the common
AMD_SOC_CONSOLE_UART one.
Change-Id: I09c15566a402895d6388715e8e5a802dc3c94fdd
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/49375
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/amd/cezanne/chip.c')
0 files changed, 0 insertions, 0 deletions