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author | Maximilian Brune <maximilian.brune@9elements.com> | 2022-08-08 12:30:47 +0200 |
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committer | Tim Wawrzynczak <twawrzynczak@chromium.org> | 2022-08-12 17:12:12 +0000 |
commit | a0bc90e4abfe2ed87865d365436ed99311954e27 (patch) | |
tree | ed47e572d73b9db59268197d5da76a18888186a5 /src/soc/amd/cezanne/bootblock.c | |
parent | eb80b1efa36c99e485b2604e913c2aa316168eea (diff) |
Add missing ADL-S device identification
R680E, Q670E, H610E are the ADL-S IoT variants
TEST=Boot ADL-S RVP DDR5 and see silicon info is reported
as PCH: AlderLake-S R680E
Signed-off-by: Maximilian Brune <maximilian.brune@9elements.com>
Change-Id: I1804994b4b72f0484eabb15323736679d2668078
Reviewed-on: https://review.coreboot.org/c/coreboot/+/66544
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Lean Sheng Tan <sheng.tan@9elements.com>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src/soc/amd/cezanne/bootblock.c')
0 files changed, 0 insertions, 0 deletions