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authorFelix Held <felix-coreboot@felixheld.de>2024-01-26 15:33:59 +0100
committerFelix Held <felix-coreboot@felixheld.de>2024-01-27 16:40:34 +0000
commit112c2277f51684157f5c46a06b3b038b5b730679 (patch)
tree4ff3ced247ed5e7342f34c00b2314ee22d55bc40 /src/soc/amd/cezanne/Makefile.mk
parent26577d2ecbb8c01635b959d296f70eb251743046 (diff)
soc/amd: move acpi_add_fsp_tables implementation to common FSP code
Since the acpi_add_fsp_tables implementation is identical for all SoCs, factor it out and move it to the common AMD FSP code. Also guard the acpi_add_fsp_tables call in soc_acpi_write_tables with if (CONFIG(PLATFORM_USES_FSP2_0)) to properly handle the FSP dependency. Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Change-Id: I8917a346f586e77b3b3278c73aed8cf61f3c9e6a Reviewed-on: https://review.coreboot.org/c/coreboot/+/80225 Reviewed-by: Matt DeVillier <matt.devillier@amd.corp-partner.google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/amd/cezanne/Makefile.mk')
-rw-r--r--src/soc/amd/cezanne/Makefile.mk1
1 files changed, 0 insertions, 1 deletions
diff --git a/src/soc/amd/cezanne/Makefile.mk b/src/soc/amd/cezanne/Makefile.mk
index dedf98c4bd..163f777dab 100644
--- a/src/soc/amd/cezanne/Makefile.mk
+++ b/src/soc/amd/cezanne/Makefile.mk
@@ -19,7 +19,6 @@ bootblock-y += espi_util.c
romstage-y += fsp_m_params.c
ramstage-y += acpi.c
-ramstage-y += agesa_acpi.c
ramstage-y += chip.c
ramstage-y += cpu.c
ramstage-y += fch.c