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| author | Felix Held <felix-coreboot@felixheld.de> | 2021-02-03 23:44:28 +0100 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2021-02-13 21:39:16 +0000 |
| commit | 86024954dfa06af9a9a7e5f19ab5aae32eb14909 (patch) | |
| tree | c5a7242122a517275655666514a20e279afc7d2f /src/soc/amd/cezanne/Makefile.inc | |
| parent | 07acbfc6a5da1e3351e01e6553cb27f5f62cdb3c (diff) | |
soc/amd/cezanne: select ACPI support and make the compiler happy
Follow-up patches will add more functionality.
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Signed-off-by: Raul E Rangel <rrangel@chromium.org>
Change-Id: I9b806569154e46418fa7d4fa35575a0acfec9132
Reviewed-on: https://review.coreboot.org/c/coreboot/+/50273
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Diffstat (limited to 'src/soc/amd/cezanne/Makefile.inc')
| -rw-r--r-- | src/soc/amd/cezanne/Makefile.inc | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/src/soc/amd/cezanne/Makefile.inc b/src/soc/amd/cezanne/Makefile.inc index 2bb9fb10bf..d395089242 100644 --- a/src/soc/amd/cezanne/Makefile.inc +++ b/src/soc/amd/cezanne/Makefile.inc @@ -24,6 +24,7 @@ romstage-y += reset.c romstage-y += romstage.c romstage-y += uart.c +ramstage-y += acpi.c ramstage-y += chip.c ramstage-y += cpu.c ramstage-y += fch.c @@ -37,6 +38,7 @@ ramstage-y += uart.c smm-y += smihandler.c CPPFLAGS_common += -I$(src)/soc/amd/cezanne/include +CPPFLAGS_common += -I$(src)/soc/amd/cezanne/acpi CPPFLAGS_common += -I$(src)/vendorcode/amd/fsp/cezanne $(call strip_quotes,$(CONFIG_FSP_M_CBFS))-options := -b $(CONFIG_FSP_M_ADDR) |