aboutsummaryrefslogtreecommitdiff
path: root/src/soc/amd/cezanne/Makefile.inc
diff options
context:
space:
mode:
authorFred Reitberger <reitbergerfred@gmail.com>2023-01-11 15:10:30 -0500
committerFelix Held <felix-coreboot@felixheld.de>2023-01-12 20:39:03 +0000
commit16f55f237cc4715dcd6c0fa2f977f6a8c506af7b (patch)
tree8108186e55ee39b7d1c63e4799a8d377c8d6b82d /src/soc/amd/cezanne/Makefile.inc
parent330a7b5c2c6edc5c76760b491957cf5b17a804f0 (diff)
soc/amd/cezanne: Use common fsp-s preloader
Use the common preloader for fsp-s Signed-off-by: Fred Reitberger <reitbergerfred@gmail.com> Change-Id: Ibbed17445c3cd8fa4da671f2a90532d3c39ad08b Reviewed-on: https://review.coreboot.org/c/coreboot/+/71845 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Jason Glenesk <jason.glenesk@gmail.com> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Diffstat (limited to 'src/soc/amd/cezanne/Makefile.inc')
-rw-r--r--src/soc/amd/cezanne/Makefile.inc1
1 files changed, 0 insertions, 1 deletions
diff --git a/src/soc/amd/cezanne/Makefile.inc b/src/soc/amd/cezanne/Makefile.inc
index 091e63f411..a028da0366 100644
--- a/src/soc/amd/cezanne/Makefile.inc
+++ b/src/soc/amd/cezanne/Makefile.inc
@@ -37,7 +37,6 @@ ramstage-y += gpio.c
ramstage-y += graphics.c
ramstage-y += i2c.c
ramstage-y += mca.c
-ramstage-y += preload.c
ramstage-y += reset.c
ramstage-y += root_complex.c
ramstage-y += uart.c