diff options
| author | Felix Held <felix-coreboot@felixheld.de> | 2021-02-05 22:26:00 +0100 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2021-02-07 17:48:59 +0000 |
| commit | 0ffebacfd798279279eae56ce04989735ce4862b (patch) | |
| tree | 5e554cd98de4fe2624ba799245ce292639a9f051 /src/soc/amd/cezanne/Makefile.inc | |
| parent | 5a7e4a59821905350c1cdfc3ddbf571c041d800e (diff) | |
soc/amd/cezanne/pcie_gpp: scan internal PCI buses
TEST=The devices on the internal buses now get resources assigned.
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: If7ff0f2ecde9189691548e071ddcfe1916933571
Reviewed-on: https://review.coreboot.org/c/coreboot/+/50334
Reviewed-by: Raul Rangel <rrangel@chromium.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/amd/cezanne/Makefile.inc')
| -rw-r--r-- | src/soc/amd/cezanne/Makefile.inc | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/soc/amd/cezanne/Makefile.inc b/src/soc/amd/cezanne/Makefile.inc index 9422a4db31..45e98a5e48 100644 --- a/src/soc/amd/cezanne/Makefile.inc +++ b/src/soc/amd/cezanne/Makefile.inc @@ -28,6 +28,7 @@ ramstage-y += chip.c ramstage-y += fch.c ramstage-y += fsp_params.c ramstage-y += gpio.c +ramstage-y += pcie_gpp.c ramstage-y += reset.c ramstage-y += uart.c |