diff options
| author | Felix Held <felix-coreboot@felixheld.de> | 2021-05-12 01:23:50 +0200 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2021-05-13 00:58:17 +0000 |
| commit | dd882f3812c5fe2fa3f709ed5e61938e723ba51d (patch) | |
| tree | 989b9f6a57441c4e60a291d09bf5f0675f1c53e0 /src/soc/amd/cezanne/Kconfig | |
| parent | 5c3b05ecf4dbb89da3dd7bc514875b53e3a8ce1c (diff) | |
soc/amd/cezanne/root_complex: generate DPTC ACPI method
This adds support for convertible devices to support different maximum
power and thermal configurations. The dynamic power and thermal
configuration (DPTC) via ACPI ALIB calls allows to change the parameters
during runtime. This code contains the assumption that
\_SB.PCI0.LPCB.EC0.TBMD exists when ACPI code calls the DPTC method. At
the moment only chromeec declares EC0.TBMD, but it's also the only code
that calls the DPTC method. The definition of DPTC_INPUTS isn't moved to
the common code directory, since it's currently unsure if we might need
to configure more than those 4 parameters for Cezanne.
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: Ibdfc056cb325a32d87505dd93e01c9af81dfd6c5
Reviewed-on: https://review.coreboot.org/c/coreboot/+/54074
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Raul Rangel <rrangel@chromium.org>
Diffstat (limited to 'src/soc/amd/cezanne/Kconfig')
| -rw-r--r-- | src/soc/amd/cezanne/Kconfig | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/soc/amd/cezanne/Kconfig b/src/soc/amd/cezanne/Kconfig index 327ec124d2..2cedf8c2d0 100644 --- a/src/soc/amd/cezanne/Kconfig +++ b/src/soc/amd/cezanne/Kconfig @@ -38,6 +38,7 @@ config SOC_SPECIFIC_OPTIONS select SOC_AMD_COMMON_BLOCK_ACP select SOC_AMD_COMMON_BLOCK_ACPI select SOC_AMD_COMMON_BLOCK_ACPIMMIO + select SOC_AMD_COMMON_BLOCK_ACPI_ALIB select SOC_AMD_COMMON_BLOCK_ACPI_GPIO select SOC_AMD_COMMON_BLOCK_AOAC select SOC_AMD_COMMON_BLOCK_APOB |