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authorFelix Held <felix-coreboot@felixheld.de>2023-03-07 18:59:42 +0100
committerFelix Held <felix-coreboot@felixheld.de>2023-03-08 20:16:20 +0000
commitd91625da60406d7d6b40d3d08155100f2705af73 (patch)
tree948d431329432648bb94dcfd50dac7466885c32c /src/soc/amd/cezanne/Kconfig
parentb47be02179ad70e26522ad925779664844980665 (diff)
soc/amd: factor out ACPI_SSDT_PSD_INDEPENDENT to common AMD ACPI Kconfig
Now that the code using the ACPI_SSDT_PSD_INDEPENDENT Kconfig symbol is moved to soc/amd/common/block/acpi/cpu_power_state.c, also move the Kconfig symbol to the Kconfig file in this directory. Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Change-Id: Ide18111df38d4e9c81f7d183f49107f382385d85 Reviewed-on: https://review.coreboot.org/c/coreboot/+/73550 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Fred Reitberger <reitbergerfred@gmail.com>
Diffstat (limited to 'src/soc/amd/cezanne/Kconfig')
-rw-r--r--src/soc/amd/cezanne/Kconfig8
1 files changed, 0 insertions, 8 deletions
diff --git a/src/soc/amd/cezanne/Kconfig b/src/soc/amd/cezanne/Kconfig
index 747f095b07..170bc49e39 100644
--- a/src/soc/amd/cezanne/Kconfig
+++ b/src/soc/amd/cezanne/Kconfig
@@ -318,14 +318,6 @@ config DISABLE_KEYBOARD_RESET_PIN
functionality isn't disabled, configuring it as an output and driving
it as 0 will cause a reset.
-config ACPI_SSDT_PSD_INDEPENDENT
- bool "Allow core p-state independent transitions"
- default y
- help
- AMD recommends the ACPI _PSD object to be configured to cause
- cores to transition between p-states independently. A vendor may
- choose to generate _PSD object to allow cores to transition together.
-
menu "PSP Configuration Options"
config AMD_FWM_POSITION_INDEX