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authorFelix Held <felix-coreboot@felixheld.de>2020-12-09 02:01:16 +0100
committerFelix Held <felix-coreboot@felixheld.de>2020-12-11 17:44:42 +0000
commit44f41537af4022ce8d8c4fadb6b690b3ec6f8c61 (patch)
treed28b4299b86f996f768f723c2a844a0146c3c606 /src/soc/amd/cezanne/Kconfig
parente04a18fc25cfb28690cd7dbd3302a63436b1ccd2 (diff)
soc/amd/cezanne: add 0xcf9 reset
Change-Id: Ibb78661c102e0d0327f3e74173bf98bc40e13960 Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/48488 Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com> Reviewed-by: Mathew King <mathewk@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/amd/cezanne/Kconfig')
-rw-r--r--src/soc/amd/cezanne/Kconfig1
1 files changed, 1 insertions, 0 deletions
diff --git a/src/soc/amd/cezanne/Kconfig b/src/soc/amd/cezanne/Kconfig
index be45de4145..be4d43294f 100644
--- a/src/soc/amd/cezanne/Kconfig
+++ b/src/soc/amd/cezanne/Kconfig
@@ -13,6 +13,7 @@ config SOC_SPECIFIC_OPTIONS
select ARCH_VERSTAGE_X86_32
select ARCH_ROMSTAGE_X86_32
select ARCH_RAMSTAGE_X86_32
+ select HAVE_CF9_RESET
select IOAPIC
select RESET_VECTOR_IN_RAM
select SOC_AMD_COMMON