From 44f41537af4022ce8d8c4fadb6b690b3ec6f8c61 Mon Sep 17 00:00:00 2001 From: Felix Held Date: Wed, 9 Dec 2020 02:01:16 +0100 Subject: soc/amd/cezanne: add 0xcf9 reset Change-Id: Ibb78661c102e0d0327f3e74173bf98bc40e13960 Signed-off-by: Felix Held Reviewed-on: https://review.coreboot.org/c/coreboot/+/48488 Reviewed-by: Marshall Dawson Reviewed-by: Mathew King Tested-by: build bot (Jenkins) --- src/soc/amd/cezanne/Kconfig | 1 + 1 file changed, 1 insertion(+) (limited to 'src/soc/amd/cezanne/Kconfig') diff --git a/src/soc/amd/cezanne/Kconfig b/src/soc/amd/cezanne/Kconfig index be45de4145..be4d43294f 100644 --- a/src/soc/amd/cezanne/Kconfig +++ b/src/soc/amd/cezanne/Kconfig @@ -13,6 +13,7 @@ config SOC_SPECIFIC_OPTIONS select ARCH_VERSTAGE_X86_32 select ARCH_ROMSTAGE_X86_32 select ARCH_RAMSTAGE_X86_32 + select HAVE_CF9_RESET select IOAPIC select RESET_VECTOR_IN_RAM select SOC_AMD_COMMON -- cgit v1.2.3