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authorAamir Bohra <aamir.bohra@intel.com>2018-12-18 16:09:27 +0530
committerSubrata Banik <subrata.banik@intel.com>2018-12-21 04:42:33 +0000
commit6d8e0cdeabf0b0a128d9863a6f190facc73f4880 (patch)
tree1d84b73b4a0e1a6852ca4f3f964bfe37aaed52dd /src/security
parent368598198d5c741d64b38d358e84c1694f97f486 (diff)
mb/google/hatch: Enable H1 TPM support over SPI interface
Add code support to enable H1 TPM interfaced to SOC on GSPI0. The TPM interrupt is mapped to GPP_C21. BUG=b:120914069 TEST=USE="-intel_mrc -bmpblk" emerge-hatch coreboot Change-Id: Ib63a0b473f632d91745102ebd01993e8d65b9552 Signed-off-by: Aamir Bohra <aamir.bohra@intel.com> Reviewed-on: https://review.coreboot.org/c/30210 Reviewed-by: Furquan Shaikh <furquan@google.com> Reviewed-by: Subrata Banik <subrata.banik@intel.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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