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authorJes B. Klinke <jbk@chromium.org>2022-04-19 14:00:33 -0700
committerJulius Werner <jwerner@chromium.org>2022-04-21 23:07:20 +0000
commitc6b041a12e56f32be37b809357225e762b070117 (patch)
treedf09f63531c43eb3c7b8f3727d3726ccdaed035a /src/security/tpm
parent0b71099f6587e9722e4554c094e5ef1c32195860 (diff)
tpm: Refactor TPM Kconfig dimensions
Break TPM related Kconfig into the following dimensions: TPM transport support: config CRB_TPM config I2C_TPM config SPI_TPM config MEMORY_MAPPED_TPM (new) TPM brand, not defining any of these is valid, and result in "generic" support: config TPM_ATMEL (new) config TPM_GOOGLE (new) config TPM_GOOGLE_CR50 (new, implies TPM_GOOGLE) config TPM_GOOGLE_TI50 (new to be used later, implies TPM_GOOGLE) What protocol the TPM chip supports: config MAINBOARD_HAS_TPM1 config MAINBOARD_HAS_TPM2 What the user chooses to compile (restricted by the above): config NO_TPM config TPM1 config TPM2 The following Kconfigs will be replaced as indicated: config TPM_CR50 -> TPM_GOOGLE config MAINBOARD_HAS_CRB_TPM -> CRB_TPM config MAINBOARD_HAS_I2C_TPM_ATMEL -> I2C_TPM && TPM_ATMEL config MAINBOARD_HAS_I2C_TPM_CR50 -> I2C_TPM && TPM_GOOGLE config MAINBOARD_HAS_I2C_TPM_GENERIC -> I2C_TPM && !TPM_GOOGLE && !TPM_ATMEL config MAINBOARD_HAS_LPC_TPM -> MEMORY_MAPPED_TPM config MAINBOARD_HAS_SPI_TPM -> SPI_TPM && !TPM_GOOGLE && !TPM_ATMEL config MAINBOARD_HAS_SPI_TPM_CR50 -> SPI_TPM && TPM_GOOGLE Signed-off-by: Jes B. Klinke <jbk@chromium.org> Change-Id: I4656b2b90363b8dfd008dc281ad591862fe2cc9e Reviewed-on: https://review.coreboot.org/c/coreboot/+/63424 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Yu-Ping Wu <yupingso@google.com> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Reviewed-by: Julius Werner <jwerner@chromium.org>
Diffstat (limited to 'src/security/tpm')
-rw-r--r--src/security/tpm/Kconfig13
-rw-r--r--src/security/tpm/Makefile.inc2
-rw-r--r--src/security/tpm/tss/vendor/cr50/Kconfig18
3 files changed, 18 insertions, 15 deletions
diff --git a/src/security/tpm/Kconfig b/src/security/tpm/Kconfig
index 4864f12545..fc339a2b3a 100644
--- a/src/security/tpm/Kconfig
+++ b/src/security/tpm/Kconfig
@@ -20,21 +20,14 @@ config NO_TPM
config TPM1
bool "TPM 1.2"
- depends on MAINBOARD_HAS_LPC_TPM || \
- MAINBOARD_HAS_I2C_TPM_GENERIC || \
- MAINBOARD_HAS_I2C_TPM_ATMEL
+ depends on I2C_TPM || MEMORY_MAPPED_TPM || SPI_TPM || CRB_TPM
depends on !MAINBOARD_HAS_TPM2
help
Select this option if your TPM uses the older TPM 1.2 protocol.
config TPM2
bool "TPM 2.0"
- depends on MAINBOARD_HAS_I2C_TPM_GENERIC || \
- MAINBOARD_HAS_LPC_TPM || \
- MAINBOARD_HAS_I2C_TPM_ATMEL || \
- MAINBOARD_HAS_I2C_TPM_CR50 || \
- MAINBOARD_HAS_SPI_TPM || \
- MAINBOARD_HAS_CRB_TPM
+ depends on I2C_TPM || MEMORY_MAPPED_TPM || SPI_TPM || CRB_TPM
depends on !MAINBOARD_HAS_TPM1
help
Select this option if your TPM uses the newer TPM 2.0 protocol.
@@ -77,7 +70,7 @@ config DEBUG_TPM
config TPM_RDRESP_NEED_DELAY
bool "Enable Delay Workaround for TPM"
default n
- depends on MAINBOARD_HAS_LPC_TPM
+ depends on MEMORY_MAPPED_TPM
help
Certain TPMs seem to need some delay when reading response
to work around a race-condition-related issue, possibly
diff --git a/src/security/tpm/Makefile.inc b/src/security/tpm/Makefile.inc
index c36183dd9b..8f633a89bf 100644
--- a/src/security/tpm/Makefile.inc
+++ b/src/security/tpm/Makefile.inc
@@ -1,4 +1,4 @@
-subdirs-$(CONFIG_TPM_CR50) += tss/vendor/cr50
+subdirs-$(CONFIG_TPM_GOOGLE) += tss/vendor/cr50
## TSS
diff --git a/src/security/tpm/tss/vendor/cr50/Kconfig b/src/security/tpm/tss/vendor/cr50/Kconfig
index c4ecdef2fd..f98b8efeb9 100644
--- a/src/security/tpm/tss/vendor/cr50/Kconfig
+++ b/src/security/tpm/tss/vendor/cr50/Kconfig
@@ -1,11 +1,21 @@
# SPDX-License-Identifier: GPL-2.0-only
-config TPM_CR50
+config TPM_GOOGLE
bool
- depends on TPM2
- default y if MAINBOARD_HAS_I2C_TPM_CR50 || MAINBOARD_HAS_SPI_TPM_CR50
-if TPM_CR50
+config TPM_GOOGLE_CR50
+ bool
+ select TPM_GOOGLE
+
+config TPM_GOOGLE_TI50
+ bool
+ select TPM_GOOGLE
+
+if TPM_GOOGLE
+
+config TPM_GOOGLE_IMMEDIATELY_COMMIT_FW_SECDATA
+ bool
+ default y
config POWER_OFF_ON_CR50_UPDATE
bool