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authorTyler Wang <tyler.wang@quanta.corp-partner.google.com>2024-05-14 14:07:02 +0800
committerJon Murphy <jpmurphy@google.com>2024-05-17 12:50:28 +0000
commit557aad1df91a11446bf1fa490a7382d1c9a4151c (patch)
tree8e104c45158c3ff62aea8b44e75b9ce4f7496304 /src/security/tpm/tss/vendor
parent43a54184b0f8bdde9cff361a9aded25715bec454 (diff)
cr50: Replace "cr50" to "GSC" in debug messages
The cr50.c file currently prints "cr50" in debug messages no matter the system is using Cr50 or Ti50. This can be confusing for developers. This patch replaces "cr50" with "GSC" in debug messages. Using "GSC" makes the messages more clear and easier to search via `grep`. BUG=none TEST=Build and test on karis Change-Id: I21f66cf8b608ca4e4dc82d7a55a851ec996c8bb3 Signed-off-by: Tyler Wang <tyler.wang@quanta.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/82420 Reviewed-by: Eric Lai <ericllai@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Yu-Ping Wu <yupingso@google.com> Reviewed-by: Jon Murphy <jpmurphy@google.com>
Diffstat (limited to 'src/security/tpm/tss/vendor')
-rw-r--r--src/security/tpm/tss/vendor/cr50/cr50.c12
1 files changed, 6 insertions, 6 deletions
diff --git a/src/security/tpm/tss/vendor/cr50/cr50.c b/src/security/tpm/tss/vendor/cr50/cr50.c
index b843afa369..8411848f56 100644
--- a/src/security/tpm/tss/vendor/cr50/cr50.c
+++ b/src/security/tpm/tss/vendor/cr50/cr50.c
@@ -14,7 +14,7 @@ tpm_result_t tlcl_cr50_enable_nvcommits(void)
uint16_t sub_command = TPM2_CR50_SUB_CMD_NVMEM_ENABLE_COMMITS;
struct tpm2_response *response;
- printk(BIOS_INFO, "Enabling cr50 nvmem commits\n");
+ printk(BIOS_INFO, "Enabling GSC nvmem commits\n");
response = tlcl2_process_command(TPM2_CR50_VENDOR_COMMAND, &sub_command);
@@ -37,7 +37,7 @@ tpm_result_t tlcl_cr50_enable_update(uint16_t timeout_ms,
TPM2_CR50_SUB_CMD_TURN_UPDATE_ON, timeout_ms
};
- printk(BIOS_INFO, "Checking cr50 for pending updates\n");
+ printk(BIOS_INFO, "Checking GSC for pending updates\n");
response = tlcl2_process_command(TPM2_CR50_VENDOR_COMMAND, command_body);
@@ -53,7 +53,7 @@ tpm_result_t tlcl_cr50_get_recovery_button(uint8_t *recovery_button_state)
struct tpm2_response *response;
uint16_t sub_command = TPM2_CR50_SUB_CMD_GET_REC_BTN;
- printk(BIOS_INFO, "Checking cr50 for recovery request\n");
+ printk(BIOS_INFO, "Checking GSC for recovery request\n");
response = tlcl2_process_command(TPM2_CR50_VENDOR_COMMAND, &sub_command);
@@ -70,7 +70,7 @@ tpm_result_t tlcl_cr50_get_tpm_mode(uint8_t *tpm_mode)
uint16_t mode_command = TPM2_CR50_SUB_CMD_TPM_MODE;
*tpm_mode = TPM_MODE_INVALID;
- printk(BIOS_INFO, "Reading cr50 TPM mode\n");
+ printk(BIOS_INFO, "Reading GSC TPM mode\n");
response = tlcl2_process_command(TPM2_CR50_VENDOR_COMMAND, &mode_command);
@@ -110,7 +110,7 @@ tpm_result_t tlcl_cr50_get_boot_mode(uint8_t *boot_mode)
struct tpm2_response *response;
uint16_t mode_command = TPM2_CR50_SUB_CMD_GET_BOOT_MODE;
- printk(BIOS_DEBUG, "Reading cr50 boot mode\n");
+ printk(BIOS_DEBUG, "Reading GSC boot mode\n");
response = tlcl2_process_command(TPM2_CR50_VENDOR_COMMAND, &mode_command);
@@ -140,7 +140,7 @@ tpm_result_t tlcl_cr50_immediate_reset(uint16_t timeout_ms)
/*
* Issue an immediate reset to the Cr50.
*/
- printk(BIOS_INFO, "Issuing cr50 reset\n");
+ printk(BIOS_INFO, "Issuing GSC reset\n");
response = tlcl2_process_command(TPM2_CR50_VENDOR_COMMAND, &reset_command_body);
if (!response)