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authorSergii Dmytruk <sergii.dmytruk@3mdeb.com>2022-10-31 15:30:15 +0200
committerMartin L Roth <gaumless@gmail.com>2024-03-28 15:12:32 +0000
commitfebf9b9f24f537b88ea5d4845a8d350d94d9e295 (patch)
tree0755fa3edfa7e77e857173c00b7ad76af5a85668 /src/security/tpm/tss/tcg-2.0
parent4b76273ac963d4c5e7a85b5e47577afe4860de6b (diff)
security/tpm: make tis_probe() return tpm_family
Via an out parameter. This is needed to be able to dynamically pick TSS implementation based on the information discovered on probing. Change-Id: I5006e0cdfef76ff79ce9e1cf280fcd5515ae01b0 Ticket: https://ticket.coreboot.org/issues/433 Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/69159 Reviewed-by: Martin L Roth <gaumless@gmail.com> Reviewed-by: Jérémy Compostella <jeremy.compostella@intel.com> Reviewed-by: Julius Werner <jwerner@chromium.org> Reviewed-by: Christian Walter <christian.walter@9elements.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/security/tpm/tss/tcg-2.0')
-rw-r--r--src/security/tpm/tss/tcg-2.0/tss.c11
1 files changed, 10 insertions, 1 deletions
diff --git a/src/security/tpm/tss/tcg-2.0/tss.c b/src/security/tpm/tss/tcg-2.0/tss.c
index 135d2964e6..27390a78ab 100644
--- a/src/security/tpm/tss/tcg-2.0/tss.c
+++ b/src/security/tpm/tss/tcg-2.0/tss.c
@@ -211,15 +211,24 @@ tpm_result_t tlcl_clear_control(bool disable)
/* This function is called directly by vboot, uses vboot return types. */
tpm_result_t tlcl_lib_init(void)
{
+ enum tpm_family family;
+
if (tis_sendrecv != NULL)
return TPM_SUCCESS;
- tis_sendrecv = tis_probe();
+ tis_sendrecv = tis_probe(&family);
if (tis_sendrecv == NULL) {
printk(BIOS_ERR, "%s: tis_probe returned error\n", __func__);
return TPM_CB_NO_DEVICE;
}
+ if (family != TPM_2) {
+ tis_sendrecv = NULL;
+ printk(BIOS_ERR, "%s: tis_probe returned unsupported TPM family: %d\n",
+ __func__, family);
+ return TPM_CB_INTERNAL_INCONSISTENCY;
+ }
+
return TPM_SUCCESS;
}