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authorFelix Held <felix-coreboot@felixheld.de>2022-09-13 22:15:51 +0200
committerFelix Held <felix-coreboot@felixheld.de>2022-09-14 20:40:44 +0000
commite74da16741623521bb08ffb74e8d54729a24d3a9 (patch)
treefa4237c1c93b7676537bb20ce237ed034a7f6e7b /src/security/intel/stm
parent3ee2420514fb17f92b2cf323133fd9c169848fcb (diff)
mb/google/kahlee: drop unused and incorrect irq_tables.c
This file is neither included in the build nor correct, since the Stoneyridge SoC doesn't have a legacy PCI bridge on bus 0 bridge 0x14 function 4. Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Change-Id: I0daed891984faed9fbc36f0215edfc56e0ae14a7 Reviewed-on: https://review.coreboot.org/c/coreboot/+/67633 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin Roth <martin.roth@amd.corp-partner.google.com>
Diffstat (limited to 'src/security/intel/stm')
0 files changed, 0 insertions, 0 deletions