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authorShuo Liu <shuo.liu@intel.com>2024-03-12 00:34:47 +0800
committerLean Sheng Tan <sheng.tan@9elements.com>2024-03-14 18:59:51 +0000
commit091fb05312d8961f77893494d6d981e2a977710d (patch)
treec01803922a4fcf946c79fa6c29e47a92d130c1c2 /src/sbom/intel-microcode.json
parente0c935b0dc8d029c987127ad6edf71a4f987d065 (diff)
soc/intel/xeon_sp: Add utils to detect domain0 and stack0
In Xeon-SP, the domain0, which is located at stack0, usually needs special handling due to the compatible devices on it (HEPT, IO-APIC and legacy IOs). This patch adds util function detect whether a give domain or stack is with such a role. TEST=intel/archercity CRB Change-Id: I2f26b4ac54091c24c554f17964502c364288aa40 Signed-off-by: Shuo Liu <shuo.liu@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/81199 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Diffstat (limited to 'src/sbom/intel-microcode.json')
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