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authorKilari Raasi <kilari.raasi@intel.com>2024-03-27 15:00:31 +0530
committerMartin L Roth <gaumless@gmail.com>2024-04-01 04:12:03 +0000
commit8ec17cf3e5eca8cbd7dd03e455c857f8a4e1d92d (patch)
tree97be193efcf26c7dec8cd2aa0c669455bbfebfaa /src/sbom/Kconfig
parent619535778cf7c6b141f8c13b967995327108a50a (diff)
soc/intel/alderlake: Remove FSP_PUBLISH_MBP_HOB config for RPL
The RPL FSP currently uses HECI commands to retrieve the chipset initialization version because the MBP HOB creation is disabled (SkipMbpHob=1). This has resulted in an approximate 150ms increase in boot time. Investigations are ongoing to determine the cause of the delay when using HECI commands. As an interim solution, this patch sets SkipMbpHob=0, enabling the use of MBP HOB or acquiring the chipset initialization version, which is expected to reduce the boot time. BUG=b:328430167 TEST= Able to build,boot and collect boot time data of brya. With this patch: 963:returning from FspMultiPhaseSiInit 1,337,481 (249,046) Without this patch: 963:returning from FspMultiPhaseSiInit 1,496,268 (408,194) Signed-off-by: Kilari Raasi <kilari.raasi@intel.com> Change-Id: I8a99a57b644732074e41051d99e63576f1edd229 Reviewed-on: https://review.coreboot.org/c/coreboot/+/81446 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Eric Lai <ericllai@google.com> Reviewed-by: Subrata Banik <subratabanik@google.com> Reviewed-by: Varshit Pandya <pandyavarshit@gmail.com> Reviewed-by: Ronak Kanabar <ronak.kanabar@intel.com>
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