diff options
author | Myles Watson <mylesgw@gmail.com> | 2009-04-30 22:45:41 +0000 |
---|---|---|
committer | Myles Watson <mylesgw@gmail.com> | 2009-04-30 22:45:41 +0000 |
commit | fa12b67771f73f0e7acf2308a13cf33b8c619884 (patch) | |
tree | 853c5b64915c1b13749561d30bbd34c8d46f1bc4 /src/northbridge | |
parent | d233f363c129dae2ba5fd7ac536cf92fb4c2dd6e (diff) |
Remove warnings from compilation of the s2892 with and without CBFS.
I didn't try to remove "defined but not used" warnings because there are too
many ifdefs to be sure I wouldn't break something.
For shadowed variable declarations I renamed the inner-most variable.
The one in src/pc80/keyboard.c might need help. I didn't change the
functionality but it looks like a bug.
I boot tested it on s2892 and abuild tested it.
Signed-off-by: Myles Watson <mylesgw@gmail.com>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4240 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/northbridge')
-rw-r--r-- | src/northbridge/amd/amdk8/amdk8.h | 3 | ||||
-rw-r--r-- | src/northbridge/amd/amdk8/amdk8_acpi.c | 2 | ||||
-rw-r--r-- | src/northbridge/amd/amdk8/debug.c | 4 | ||||
-rw-r--r-- | src/northbridge/amd/amdk8/incoherent_ht.c | 8 | ||||
-rw-r--r-- | src/northbridge/amd/amdk8/northbridge.c | 46 | ||||
-rw-r--r-- | src/northbridge/amd/amdk8/raminit.c | 19 |
6 files changed, 43 insertions, 39 deletions
diff --git a/src/northbridge/amd/amdk8/amdk8.h b/src/northbridge/amd/amdk8/amdk8.h index 7e2f0b0fc3..f8d3aaaced 100644 --- a/src/northbridge/amd/amdk8/amdk8.h +++ b/src/northbridge/amd/amdk8/amdk8.h @@ -244,7 +244,6 @@ #include "raminit.h" //struct definitions -#if RAMINIT_SYSINFO==1 struct link_pair_st { device_t udev; uint32_t upos; @@ -267,8 +266,6 @@ struct sys_info { uint32_t sblk; uint32_t sbbusn; } __attribute__((packed)); -#endif - #endif diff --git a/src/northbridge/amd/amdk8/amdk8_acpi.c b/src/northbridge/amd/amdk8/amdk8_acpi.c index 295579166d..b6d4ed46f9 100644 --- a/src/northbridge/amd/amdk8/amdk8_acpi.c +++ b/src/northbridge/amd/amdk8/amdk8_acpi.c @@ -218,8 +218,6 @@ unsigned long acpi_fill_slit(unsigned long current) } static int k8acpi_write_HT(void) { - device_t dev; - uint32_t dword; int len, lenp, i; len = acpigen_write_name("HCLK"); diff --git a/src/northbridge/amd/amdk8/debug.c b/src/northbridge/amd/amdk8/debug.c index 3188872ed5..4ed376ae07 100644 --- a/src/northbridge/amd/amdk8/debug.c +++ b/src/northbridge/amd/amdk8/debug.c @@ -3,6 +3,10 @@ * */ +#ifndef CACHE_AS_RAM_ADDRESS_DEBUG +#define CACHE_AS_RAM_ADDRESS_DEBUG 0 +#endif + static inline void print_debug_addr(const char *str, void *val) { #if CACHE_AS_RAM_ADDRESS_DEBUG == 1 diff --git a/src/northbridge/amd/amdk8/incoherent_ht.c b/src/northbridge/amd/amdk8/incoherent_ht.c index 4dac99c341..74c9f4fe4f 100644 --- a/src/northbridge/amd/amdk8/incoherent_ht.c +++ b/src/northbridge/amd/amdk8/incoherent_ht.c @@ -11,6 +11,10 @@ #define K8_HT_FREQ_1G_SUPPORT 0 #endif +#ifndef RAMINIT_SYSINFO + #define RAMINIT_SYSINFO 0 +#endif + #ifndef K8_SCAN_PCI_BUS #define K8_SCAN_PCI_BUS 0 #endif @@ -79,7 +83,6 @@ static uint8_t ht_lookup_host_capability(device_t dev) static void ht_collapse_previous_enumeration(uint8_t bus, unsigned offset_unitid) { device_t dev; - uint32_t id; //actually, only for one HT device HT chain, and unitid is 0 #if HT_CHAIN_UNITID_BASE == 0 @@ -90,6 +93,7 @@ static void ht_collapse_previous_enumeration(uint8_t bus, unsigned offset_unitid /* Check if is already collapsed */ if((!offset_unitid) || (offset_unitid && (!((HT_CHAIN_END_UNITID_BASE == 0) && (HT_CHAIN_END_UNITID_BASE <HT_CHAIN_UNITID_BASE))))) { + uint32_t id; dev = PCI_DEV(bus, 0, 0); id = pci_read_config32(dev, PCI_VENDOR_ID); if (!((id == 0xffffffff) || (id == 0x00000000) || @@ -556,7 +560,9 @@ static int ht_setup_chainx(device_t udev, uint8_t upos, uint8_t bus, unsigned of } while (last_unitid != next_unitid ); +#if HT_CHAIN_END_UNITID_BASE != 0x20 out: +#endif end_of_chain: ; #if HT_CHAIN_END_UNITID_BASE != 0x20 diff --git a/src/northbridge/amd/amdk8/northbridge.c b/src/northbridge/amd/amdk8/northbridge.c index ac9dc20634..b6c0f7c8c0 100644 --- a/src/northbridge/amd/amdk8/northbridge.c +++ b/src/northbridge/amd/amdk8/northbridge.c @@ -288,7 +288,7 @@ static int reg_useable(unsigned reg, device_t goal_dev, unsigned goal_nodeid, unsigned goal_link) { struct resource *res; - unsigned nodeid, link; + unsigned nodeid, link=0; int result; res = 0; for(nodeid = 0; !res && (nodeid < FX_DEVS); nodeid++) { @@ -648,16 +648,16 @@ static void pci_domain_read_resources(device_t dev) /* Is this register allocated? */ if ((base & 3) != 0) { unsigned nodeid, link; - device_t dev; + device_t reg_dev; nodeid = limit & 7; link = (limit >> 4) & 3; - dev = __f0_dev[nodeid]; - if (dev) { + reg_dev = __f0_dev[nodeid]; + if (reg_dev) { /* Reserve the resource */ - struct resource *resource; - resource = new_resource(dev, 0x100 + (reg | link)); - if (resource) { - resource->flags = 1; + struct resource *reg_resource; + reg_resource = new_resource(reg_dev, 0x100 + (reg | link)); + if (reg_resource) { + reg_resource->flags = 1; } } } @@ -1222,20 +1222,20 @@ static unsigned int cpu_bus_scan(device_t dev, unsigned int max) /* Find which cpus are present */ cpu_bus = &dev->link[0]; for(i = 0; i < sysconf.nodes; i++) { - device_t dev, cpu; + device_t cpu_dev, cpu; struct device_path cpu_path; /* Find the cpu's pci device */ - dev = dev_find_slot(0, PCI_DEVFN(0x18 + i, 3)); - if (!dev) { + cpu_dev = dev_find_slot(0, PCI_DEVFN(0x18 + i, 3)); + if (!cpu_dev) { /* If I am probing things in a weird order * ensure all of the cpu's pci devices are found. */ - int j; + int local_j; device_t dev_f0; - for(j = 0; j <= 3; j++) { - dev = pci_probe_dev(NULL, dev_mc->bus, - PCI_DEVFN(0x18 + i, j)); + for(local_j = 0; local_j <= 3; local_j++) { + cpu_dev = pci_probe_dev(NULL, dev_mc->bus, + PCI_DEVFN(0x18 + i, local_j)); } /* Ok, We need to set the links for that device. * otherwise the device under it will not be scanned @@ -1243,19 +1243,19 @@ static unsigned int cpu_bus_scan(device_t dev, unsigned int max) dev_f0 = dev_find_slot(0, PCI_DEVFN(0x18+i,0)); if(dev_f0) { dev_f0->links = 3; - for(j=0;j<3;j++) { - dev_f0->link[j].link = j; - dev_f0->link[j].dev = dev_f0; + for(local_j=0;local_j<3;local_j++) { + dev_f0->link[local_j].link = local_j; + dev_f0->link[local_j].dev = dev_f0; } } } e0_later_single_core = 0; - if (dev && dev->enabled) { - j = pci_read_config32(dev, 0xe8); + if (cpu_dev && cpu_dev->enabled) { + j = pci_read_config32(cpu_dev, 0xe8); j = (j >> 12) & 3; // dev is func 3 - printk_debug(" %s siblings=%d\n", dev_path(dev), j); + printk_debug(" %s siblings=%d\n", dev_path(cpu_dev), j); if(nb_cfg_54) { // For e0 single core if nb_cfg_54 is set, apicid will be 0, 2, 4.... @@ -1308,7 +1308,7 @@ static unsigned int cpu_bus_scan(device_t dev, unsigned int max) cpu = find_dev_path(cpu_bus, &cpu_path); /* Enable the cpu if I have the processor */ - if (dev && dev->enabled) { + if (cpu_dev && cpu_dev->enabled) { if (!cpu) { cpu = alloc_dev(cpu_bus, &cpu_path); } @@ -1318,7 +1318,7 @@ static unsigned int cpu_bus_scan(device_t dev, unsigned int max) } /* Disable the cpu if I don't have the processor */ - if (cpu && (!dev || !dev->enabled)) { + if (cpu && (!cpu_dev || !cpu_dev->enabled)) { cpu->enabled = 0; } diff --git a/src/northbridge/amd/amdk8/raminit.c b/src/northbridge/amd/amdk8/raminit.c index ea706b8e05..70c05f3560 100644 --- a/src/northbridge/amd/amdk8/raminit.c +++ b/src/northbridge/amd/amdk8/raminit.c @@ -805,7 +805,6 @@ static void set_dimm_map(const struct mem_controller *ctrl, struct dimm_size sz, }; uint32_t map; - uint32_t dch; map = pci_read_config32(ctrl->f2, DRAM_BANK_ADDR_MAP); map &= ~(0xf << (index * 4)); @@ -1491,19 +1490,19 @@ static struct spd_set_memclk_result spd_set_memclk(const struct mem_controller * /* Loop through and find a fast clock with a low latency */ for(index = 0; index < 3; index++, latency++) { - int value; + int spd_value; if ((latency < 2) || (latency > 4) || (!(latencies & (1 << latency)))) { continue; } - value = spd_read_byte(ctrl->channel0[i], latency_indicies[index]); - if (value < 0) { + spd_value = spd_read_byte(ctrl->channel0[i], latency_indicies[index]); + if (spd_value < 0) { goto hw_error; } /* Only increase the latency if we decreas the clock */ - if ((value >= min_cycle_time) && (value < new_cycle_time)) { - new_cycle_time = value; + if ((spd_value >= min_cycle_time) && (spd_value < new_cycle_time)) { + new_cycle_time = spd_value; new_latency = latency; } } @@ -1527,7 +1526,7 @@ static struct spd_set_memclk_result spd_set_memclk(const struct mem_controller * int latencies; int latency; int index; - int value; + int spd_value; if (!(dimm_mask & (1 << i))) { continue; } @@ -1554,13 +1553,13 @@ static struct spd_set_memclk_result spd_set_memclk(const struct mem_controller * } /* Read the min_cycle_time for this latency */ - value = spd_read_byte(ctrl->channel0[i], latency_indicies[index]); - if (value < 0) goto hw_error; + spd_value = spd_read_byte(ctrl->channel0[i], latency_indicies[index]); + if (spd_value < 0) goto hw_error; /* All is good if the selected clock speed * is what I need or slower. */ - if (value <= min_cycle_time) { + if (spd_value <= min_cycle_time) { continue; } /* Otherwise I have an error, disable the dimm */ |