diff options
| author | Angel Pons <th3fanbus@gmail.com> | 2021-01-12 22:25:28 +0100 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2021-01-15 11:20:04 +0000 |
| commit | eef4343a9f0e94a5a2137793d15c582278715d28 (patch) | |
| tree | d39a79a7cea1001c5851775c94bc4cb902ae71db /src/northbridge | |
| parent | 70dca08f2559ac7d704a2fadc8af8adc992dc619 (diff) | |
nb/intel/pineview: Extract HPET setup and delay function
To allow other platforms to reuse this code, extract it into a separate
compilation unit. Since HPET is enabled through the southbridge, place
the code in the southbridge scope. Finally, select the newly-added
Kconfig option from i82801gx and replace lpc.c `enable_hpet` function.
Change-Id: I7a28cc4d12c6d79cd8ec45dfc8100f15e6eac303
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/49365
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Diffstat (limited to 'src/northbridge')
| -rw-r--r-- | src/northbridge/intel/pineview/raminit.c | 36 |
1 files changed, 1 insertions, 35 deletions
diff --git a/src/northbridge/intel/pineview/raminit.c b/src/northbridge/intel/pineview/raminit.c index 2248d03c89..dd728e8a47 100644 --- a/src/northbridge/intel/pineview/raminit.c +++ b/src/northbridge/intel/pineview/raminit.c @@ -8,6 +8,7 @@ #include <console/console.h> #include <delay.h> #include <lib.h> +#include <southbridge/intel/common/hpet.h> #include "pineview.h" #include "raminit.h" #include <spd.h> @@ -529,20 +530,6 @@ static void sdram_detect_ram_speed(struct sysinfo *s) } } -#define HPET_BASE 0xfed00000 -#define HPET32(x) *((volatile u32 *)(HPET_BASE + x)) -static void enable_hpet(void) -{ - u32 reg32; - reg32 = RCBA32(HPTC); - reg32 &= ~0x03; - reg32 |= (1 << 7); - RCBA32(HPTC) = reg32; - /* On NM10 this only works if read back */ - RCBA32(HPTC); - HPET32(0x10) = HPET32(0x10) | 1; -} - static void sdram_clk_crossing(struct sysinfo *s) { u8 ddr_freq, fsb_freq; @@ -1595,27 +1582,6 @@ static void sdram_mmap(struct sysinfo *s) pci_write_config32(HOST_BRIDGE, 0xac, tsegmb[s->dimm_config[0]]); } -static void hpet_udelay(u32 del) -{ - u32 start, finish, now; - - del *= 15; /* now in usec */ - - start = HPET32(0xf0); - finish = start + del; - while (1) { - now = HPET32(0xf0); - if (finish > start) { - if (now >= finish) - break; - } else { - if ((now < start) && (now >= finish)) { - break; - } - } - } -} - static u8 sdram_checkrcompoverride(void) { u32 xcomp; |