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authorAngel Pons <th3fanbus@gmail.com>2021-02-11 14:24:03 +0100
committerAngel Pons <th3fanbus@gmail.com>2021-02-12 19:49:16 +0000
commit9a094c4b6345e498ac47dc7c30cde2b144f131f5 (patch)
tree96603d0c7f339fbff23b63de3078072adaa50c50 /src/northbridge
parentfb95555088d1b359b72f9dce739a65c4b8295f1a (diff)
nb/intel/haswell/pei_data.h: Define `SPD_LEN`
Change-Id: I34561372bcdd00b1b3e4dcd6be89fa47d2af9b42 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/50541 Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/northbridge')
-rw-r--r--src/northbridge/intel/haswell/pei_data.h4
1 files changed, 3 insertions, 1 deletions
diff --git a/src/northbridge/intel/haswell/pei_data.h b/src/northbridge/intel/haswell/pei_data.h
index 6bdfde4494..4f2f80dff5 100644
--- a/src/northbridge/intel/haswell/pei_data.h
+++ b/src/northbridge/intel/haswell/pei_data.h
@@ -8,6 +8,8 @@
typedef void (*tx_byte_func)(unsigned char byte);
#define PEI_VERSION 15
+#define SPD_LEN 256
+
#define MAX_USB2_PORTS 16
#define MAX_USB3_PORTS 16
#define USB_OC_PIN_SKIP 8
@@ -82,7 +84,7 @@ struct pei_data
int usb_xhci_on_resume;
struct usb2_port_setting usb2_ports[MAX_USB2_PORTS];
struct usb3_port_setting usb3_ports[MAX_USB3_PORTS];
- uint8_t spd_data[4][256];
+ uint8_t spd_data[4][SPD_LEN];
tx_byte_func tx_byte;
} __packed;