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authorArthur Heymans <arthur@aheymans.xyz>2023-07-05 09:42:09 +0200
committerKyösti Mälkki <kyosti.malkki@gmail.com>2023-07-17 17:21:14 +0000
commit8554954f9cf23d3858f2826ac11c1d026b8faece (patch)
tree26bc84cfeae3295eb17aca84c52399afd012270b /src/northbridge
parenta5543aeae6e7459e7206b16952b8ace774e5b0c0 (diff)
nb/intel/i945: Rework nb resource reading
- Use newer functions and avoid the * / KiB dance - Use existing functions for figuring out TSEG and UMA Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Change-Id: I73549b23bd1bfd4009e6467a5bdfeef7de81a0cc Reviewed-on: https://review.coreboot.org/c/coreboot/+/76272 Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-by: Martin L Roth <gaumless@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/northbridge')
-rw-r--r--src/northbridge/intel/i945/northbridge.c75
1 files changed, 23 insertions, 52 deletions
diff --git a/src/northbridge/intel/i945/northbridge.c b/src/northbridge/intel/i945/northbridge.c
index 00276562d8..47c14f7806 100644
--- a/src/northbridge/intel/i945/northbridge.c
+++ b/src/northbridge/intel/i945/northbridge.c
@@ -11,16 +11,13 @@
#include <acpi/acpi.h>
#include <cpu/intel/smm_reloc.h>
#include <cpu/intel/speedstep.h>
+#include <cpu/x86/smm.h>
#include "i945.h"
static void mch_domain_read_resources(struct device *dev)
{
- uint32_t pci_tolm, tseg_sizek, cbmem_topk, delta_cbmem;
- uint8_t tolud;
- uint16_t reg16;
- unsigned long long tomk, tomk_stolen;
- uint64_t uma_memory_base = 0, uma_memory_size = 0;
- uint64_t tseg_memory_base = 0, tseg_memory_size = 0;
+ uint32_t pci_tolm;
+ uintptr_t tolud;
struct device *const d0f0 = pcidev_on_root(0, 0);
int idx = 3;
@@ -32,59 +29,33 @@ static void mch_domain_read_resources(struct device *dev)
pci_tolm = find_pci_tolm(dev->link_list);
printk(BIOS_DEBUG, "pci_tolm: 0x%x\n", pci_tolm);
- tolud = pci_read_config8(d0f0, TOLUD);
- printk(BIOS_SPEW, "Top of Low Used DRAM: 0x%08x\n", tolud << 24);
+ tolud = pci_read_config8(d0f0, TOLUD) << 24;
+ printk(BIOS_SPEW, "Top of Low Used DRAM: 0x%08lx\n", tolud);
- tomk = tolud << 14;
- tomk_stolen = tomk;
-
- /* Note: subtract IGD device and TSEG */
- reg16 = pci_read_config16(d0f0, GGC);
- if (!(reg16 & 2)) {
- printk(BIOS_DEBUG, "IGD decoded, subtracting ");
- int uma_size = decode_igd_memory_size((reg16 >> 4) & 7);
-
- printk(BIOS_DEBUG, "%dM UMA\n", uma_size / KiB);
- tomk_stolen -= uma_size;
-
- /* For reserving UMA memory in the memory map */
- uma_memory_base = tomk_stolen * 1024ULL;
- uma_memory_size = uma_size * 1024ULL;
-
- printk(BIOS_SPEW, "Base of stolen memory: 0x%08x\n",
- (unsigned int)uma_memory_base);
- }
+ /* Report the memory regions */
+ ram_range(dev, idx++, 0, 0xa0000);
+ ram_from_to(dev, idx++, 1 * MiB, (uintptr_t)cbmem_top());
- tseg_sizek = decode_tseg_size(pci_read_config8(d0f0, ESMRAMC)) / KiB;
- printk(BIOS_DEBUG, "TSEG decoded, subtracting %dM\n", tseg_sizek / KiB);
- tomk_stolen -= tseg_sizek;
- tseg_memory_base = tomk_stolen * 1024ULL;
- tseg_memory_size = tseg_sizek * 1024ULL;
+ /* TSEG */
+ uintptr_t tseg_base;
+ size_t tseg_size;
+ smm_region(&tseg_base, &tseg_size);
+ mmio_range(dev, idx++, tseg_base, tseg_size);
/* cbmem_top can be shifted downwards due to alignment.
- Mark the region between cbmem_top and tomk as unusable */
- cbmem_topk = ((uintptr_t)cbmem_top() / KiB);
- delta_cbmem = tomk_stolen - cbmem_topk;
- tomk_stolen -= delta_cbmem;
-
- printk(BIOS_DEBUG, "Unused RAM between cbmem_top and TOM: 0x%xK\n", delta_cbmem);
-
- /* The following needs to be 2 lines, otherwise the second
- * number is always 0
- */
- printk(BIOS_INFO, "Available memory: %dK", (uint32_t)tomk_stolen);
- printk(BIOS_INFO, " (%dM)\n", (uint32_t)(tomk_stolen / KiB));
+ Mark the region between cbmem_top and tseg_base as unusable */
+ if ((uintptr_t)cbmem_top() < tseg_base) {
+ printk(BIOS_DEBUG, "Unused RAM between cbmem_top and TOM: 0x%lx\n",
+ tseg_base - (uintptr_t)cbmem_top());
+ mmio_from_to(dev, idx++, (uintptr_t)cbmem_top(), tseg_base);
+ }
+ if (tseg_base + tseg_size < tolud)
+ mmio_from_to(dev, idx++, tseg_base + tseg_size, tolud);
- /* Report the memory regions */
- ram_resource_kb(dev, idx++, 0, 0xa0000 / KiB);
- ram_resource_kb(dev, idx++, 1 * MiB / KiB, (tomk - 1 * MiB / KiB));
- uma_resource_kb(dev, idx++, uma_memory_base / KiB, uma_memory_size / KiB);
- mmio_resource_kb(dev, idx++, tseg_memory_base / KiB, tseg_memory_size / KiB);
- uma_resource_kb(dev, idx++, cbmem_topk, delta_cbmem);
/* legacy VGA memory */
- mmio_resource_kb(dev, idx++, 0xa0000 / KiB, (0xc0000 - 0xa0000) / KiB);
+ mmio_from_to(dev, idx++, 0xa0000, 0xc0000);
/* RAM to be used for option roms and BIOS */
- reserved_ram_resource_kb(dev, idx++, 0xc0000 / KiB, (1 * MiB - 0xc0000) / KiB);
+ reserved_ram_from_to(dev, idx++, 0xc0000, 1 * MiB);
}
static void mch_domain_set_resources(struct device *dev)