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authorSrinidhi N Kaushik <srinidhi.n.kaushik@intel.com>2020-03-05 00:54:02 -0800
committerPatrick Georgi <pgeorgi@google.com>2020-03-06 17:24:26 +0000
commit8488853fab0417b222ae04924574bd6f2221ca0e (patch)
treefa2766560a44948ca50bee3f5c9ad8588e6a5751 /src/northbridge
parentdbc958495d3b7c94046b3b8f826f9316ee528e48 (diff)
soc/intel/tigerlake: Enable CNVi Mode
Add configs to enable CNVi mode and CNViBtCore. BUG=none BRANCH=none TEST=Build and boot tglrvp Signed-off-by: Srinidhi N Kaushik <srinidhi.n.kaushik@intel.com> Change-Id: Ic372348a1409b2594a85b71b2fc742be96b84b87 Reviewed-on: https://review.coreboot.org/c/coreboot/+/39317 Reviewed-by: Nick Vaccaro <nvaccaro@google.com> Reviewed-by: caveh jalali <caveh@chromium.org> Reviewed-by: Wonkyu Kim <wonkyu.kim@intel.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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