diff options
| author | Elyes HAOUAS <ehaouas@noos.fr> | 2019-03-16 08:40:06 +0100 |
|---|---|---|
| committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2019-03-16 11:46:58 +0000 |
| commit | 74aa99a5435ce3a1b984a3e0e5a0b696d6f6165d (patch) | |
| tree | f4b9a4812620dedae0d786340bbf18ab247cc395 /src/northbridge | |
| parent | 4b7202e250b322e6347de5483abb61bbf92de18c (diff) | |
src: Drop unused '#include <halt.h>'
Change-Id: Ie7afe77053a21bcf6a1bf314570f897d1791a620
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/31921
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src/northbridge')
| -rw-r--r-- | src/northbridge/amd/agesa/family14/state_machine.c | 1 | ||||
| -rw-r--r-- | src/northbridge/intel/pineview/early_init.c | 1 | ||||
| -rw-r--r-- | src/northbridge/intel/pineview/raminit.c | 1 | ||||
| -rw-r--r-- | src/northbridge/intel/pineview/romstage.c | 1 | ||||
| -rw-r--r-- | src/northbridge/intel/sandybridge/romstage.c | 1 | ||||
| -rw-r--r-- | src/northbridge/intel/x4x/early_init.c | 1 |
6 files changed, 1 insertions, 5 deletions
diff --git a/src/northbridge/amd/agesa/family14/state_machine.c b/src/northbridge/amd/agesa/family14/state_machine.c index 8db6095dec..d29656cd22 100644 --- a/src/northbridge/amd/agesa/family14/state_machine.c +++ b/src/northbridge/amd/agesa/family14/state_machine.c @@ -22,7 +22,6 @@ #include <device/device.h> #include <device/pci_def.h> #include <device/pci_ops.h> -#include <halt.h> #include <smp/node.h> #include <northbridge/amd/agesa/state_machine.h> #include <northbridge/amd/agesa/agesa_helper.h> diff --git a/src/northbridge/intel/pineview/early_init.c b/src/northbridge/intel/pineview/early_init.c index 11dc203d1e..4f284747b9 100644 --- a/src/northbridge/intel/pineview/early_init.c +++ b/src/northbridge/intel/pineview/early_init.c @@ -21,7 +21,6 @@ #include <device/pci_ops.h> #include <device/pci_def.h> #include <device/pci.h> -#include <halt.h> #include <string.h> #include <northbridge/intel/pineview/pineview.h> #include <northbridge/intel/pineview/chip.h> diff --git a/src/northbridge/intel/pineview/raminit.c b/src/northbridge/intel/pineview/raminit.c index 5aea59ef17..fa5122afc6 100644 --- a/src/northbridge/intel/pineview/raminit.c +++ b/src/northbridge/intel/pineview/raminit.c @@ -20,7 +20,6 @@ #include <console/console.h> #include <cpu/x86/cache.h> #include <delay.h> -#include <halt.h> #include <lib.h> #include "pineview.h" #include "raminit.h" diff --git a/src/northbridge/intel/pineview/romstage.c b/src/northbridge/intel/pineview/romstage.c index 757e272fc3..cf1da63f85 100644 --- a/src/northbridge/intel/pineview/romstage.c +++ b/src/northbridge/intel/pineview/romstage.c @@ -23,6 +23,7 @@ #include <console/console.h> #include <device/pci_ops.h> #include <cbmem.h> +#include <halt.h> #include <romstage_handoff.h> #include <southbridge/intel/i82801gx/i82801gx.h> #include <southbridge/intel/common/gpio.h> diff --git a/src/northbridge/intel/sandybridge/romstage.c b/src/northbridge/intel/sandybridge/romstage.c index c979897354..d48bac4a0f 100644 --- a/src/northbridge/intel/sandybridge/romstage.c +++ b/src/northbridge/intel/sandybridge/romstage.c @@ -27,7 +27,6 @@ #include <cpu/intel/romstage.h> #include <device/pci_def.h> #include <device/device.h> -#include <halt.h> #include <northbridge/intel/sandybridge/chip.h> #include <southbridge/intel/bd82x6x/pch.h> #include <southbridge/intel/common/gpio.h> diff --git a/src/northbridge/intel/x4x/early_init.c b/src/northbridge/intel/x4x/early_init.c index 5ccc77e9be..d019ffd7f5 100644 --- a/src/northbridge/intel/x4x/early_init.c +++ b/src/northbridge/intel/x4x/early_init.c @@ -26,7 +26,6 @@ #include <pc80/mc146818rtc.h> #include "x4x.h" #include <console/console.h> -#include <halt.h> #include <romstage_handoff.h> void x4x_early_init(void) |