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authorKyösti Mälkki <kyosti.malkki@gmail.com>2020-01-07 22:34:33 +0200
committerPatrick Georgi <pgeorgi@google.com>2020-06-22 11:53:31 +0000
commit1a1b04ea51686226e9dddbd9dd74550b340578a1 (patch)
treebe754ae1643ee323df8ef78a7b028820cd0456e4 /src/northbridge
parentfc57d6c4c2848726be1361f6dee3c33e7551b857 (diff)
device/smbus_host: Declare common early SMBus prototypes
Change-Id: I1157cf391178a27db437d1d08ef5cb9333e976d0 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/38233 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src/northbridge')
-rw-r--r--src/northbridge/intel/e7505/raminit.c2
-rw-r--r--src/northbridge/intel/gm45/raminit.c1
-rw-r--r--src/northbridge/intel/i440bx/debug.c2
-rw-r--r--src/northbridge/intel/i440bx/raminit.c3
-rw-r--r--src/northbridge/intel/i945/debug.c1
-rw-r--r--src/northbridge/intel/i945/raminit.c1
-rw-r--r--src/northbridge/intel/ironlake/raminit.c1
-rw-r--r--src/northbridge/intel/pineview/raminit.c1
-rw-r--r--src/northbridge/intel/sandybridge/raminit.c4
-rw-r--r--src/northbridge/intel/x4x/raminit.c6
10 files changed, 11 insertions, 11 deletions
diff --git a/src/northbridge/intel/e7505/raminit.c b/src/northbridge/intel/e7505/raminit.c
index b87ba6e122..404ab2fb39 100644
--- a/src/northbridge/intel/e7505/raminit.c
+++ b/src/northbridge/intel/e7505/raminit.c
@@ -16,6 +16,7 @@
#include <arch/io.h>
#include <device/mmio.h>
#include <device/pci_ops.h>
+#include <device/smbus_host.h>
#include <lib.h>
#include <commonlib/helpers.h>
#include <console/console.h>
@@ -24,7 +25,6 @@
#include <spd.h>
#include <sdram_mode.h>
#include <timestamp.h>
-#include <southbridge/intel/i82801dx/i82801dx.h>
#include "raminit.h"
#include "e7505.h"
diff --git a/src/northbridge/intel/gm45/raminit.c b/src/northbridge/intel/gm45/raminit.c
index fbf9f01cfa..86c7ace983 100644
--- a/src/northbridge/intel/gm45/raminit.c
+++ b/src/northbridge/intel/gm45/raminit.c
@@ -7,6 +7,7 @@
#include <device/pci_ops.h>
#include <device/pci_def.h>
#include <device/device.h>
+#include <device/smbus_host.h>
#include <spd.h>
#include <console/console.h>
#include <lib.h>
diff --git a/src/northbridge/intel/i440bx/debug.c b/src/northbridge/intel/i440bx/debug.c
index b2b96176ca..63b8e8ff25 100644
--- a/src/northbridge/intel/i440bx/debug.c
+++ b/src/northbridge/intel/i440bx/debug.c
@@ -2,8 +2,8 @@
#include <console/console.h>
#include <device/pci_ops.h>
+#include <device/smbus_host.h>
#include <spd.h>
-#include <southbridge/intel/i82371eb/i82371eb.h>
#include "raminit.h"
void dump_spd_registers(void)
diff --git a/src/northbridge/intel/i440bx/raminit.c b/src/northbridge/intel/i440bx/raminit.c
index 19108136ab..e5d377e0c2 100644
--- a/src/northbridge/intel/i440bx/raminit.c
+++ b/src/northbridge/intel/i440bx/raminit.c
@@ -6,13 +6,12 @@
#include <device/mmio.h>
#include <device/pci_ops.h>
#include <device/pci_def.h>
+#include <device/smbus_host.h>
#include <console/console.h>
#include <timestamp.h>
#include "i440bx.h"
#include "raminit.h"
-#include <southbridge/intel/i82371eb/i82371eb.h>
-
/*
* Macros and definitions
*/
diff --git a/src/northbridge/intel/i945/debug.c b/src/northbridge/intel/i945/debug.c
index 65da1aed68..db987cae8b 100644
--- a/src/northbridge/intel/i945/debug.c
+++ b/src/northbridge/intel/i945/debug.c
@@ -3,6 +3,7 @@
#include <spd.h>
#include <device/pci_ops.h>
#include <device/pci_def.h>
+#include <device/smbus_host.h>
#include <console/console.h>
#include "i945.h"
diff --git a/src/northbridge/intel/i945/raminit.c b/src/northbridge/intel/i945/raminit.c
index c668e79821..1c7a1f0769 100644
--- a/src/northbridge/intel/i945/raminit.c
+++ b/src/northbridge/intel/i945/raminit.c
@@ -4,6 +4,7 @@
#include <delay.h>
#include <device/pci_def.h>
#include <device/pci_ops.h>
+#include <device/smbus_host.h>
#include <cf9_reset.h>
#include <device/mmio.h>
#include <device/device.h>
diff --git a/src/northbridge/intel/ironlake/raminit.c b/src/northbridge/intel/ironlake/raminit.c
index e85163fe72..13f0c35231 100644
--- a/src/northbridge/intel/ironlake/raminit.c
+++ b/src/northbridge/intel/ironlake/raminit.c
@@ -6,6 +6,7 @@
#include <arch/io.h>
#include <device/mmio.h>
#include <device/pci_ops.h>
+#include <device/smbus_host.h>
#include <cpu/x86/msr.h>
#include <cpu/x86/cache.h>
#include <cbmem.h>
diff --git a/src/northbridge/intel/pineview/raminit.c b/src/northbridge/intel/pineview/raminit.c
index af846e3588..43149be723 100644
--- a/src/northbridge/intel/pineview/raminit.c
+++ b/src/northbridge/intel/pineview/raminit.c
@@ -3,6 +3,7 @@
#include <cf9_reset.h>
#include <device/mmio.h>
#include <device/pci_ops.h>
+#include <device/smbus_host.h>
#include <commonlib/helpers.h>
#include <console/console.h>
#include <delay.h>
diff --git a/src/northbridge/intel/sandybridge/raminit.c b/src/northbridge/intel/sandybridge/raminit.c
index 72c284fb30..422067b5d2 100644
--- a/src/northbridge/intel/sandybridge/raminit.c
+++ b/src/northbridge/intel/sandybridge/raminit.c
@@ -89,10 +89,10 @@ void read_spd(spd_raw_data * spd, u8 addr, bool id_only)
int j;
if (id_only) {
for (j = 117; j < 128; j++)
- (*spd)[j] = do_smbus_read_byte(SMBUS_IO_BASE, addr, j);
+ (*spd)[j] = smbus_read_byte(addr, j);
} else {
for (j = 0; j < 256; j++)
- (*spd)[j] = do_smbus_read_byte(SMBUS_IO_BASE, addr, j);
+ (*spd)[j] = smbus_read_byte(addr, j);
}
}
diff --git a/src/northbridge/intel/x4x/raminit.c b/src/northbridge/intel/x4x/raminit.c
index 5fc9a7ac39..174e8b501e 100644
--- a/src/northbridge/intel/x4x/raminit.c
+++ b/src/northbridge/intel/x4x/raminit.c
@@ -1,15 +1,11 @@
/* SPDX-License-Identifier: GPL-2.0-or-later */
#include <device/pci_ops.h>
+#include <device/smbus_host.h>
#include <cbmem.h>
#include <cf9_reset.h>
#include <console/console.h>
#include <arch/cpu.h>
-#if CONFIG(SOUTHBRIDGE_INTEL_I82801GX)
-#include <southbridge/intel/i82801gx/i82801gx.h> /* smbus_read_byte */
-#else
-#include <southbridge/intel/i82801jx/i82801jx.h> /* smbus_read_byte */
-#endif
#include <spd.h>
#include <string.h>
#include <device/dram/ddr2.h>