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authorMarshall Dawson <marshalldawson3rd@gmail.com>2017-09-27 14:53:34 -0600
committerMartin Roth <martinroth@google.com>2017-10-02 22:27:19 +0000
commit16745e39b636ad58e0f43b254ceb7812b7fbe7f9 (patch)
tree86d437d98b34440da32c903e848171bed0b8a818 /src/northbridge
parentf7ace0da45d37da9482df3b0e38fe3cabbb9a1c0 (diff)
amd/stoneyridge: Add pm_read32 and pm_write32 to southbridge
Duplicate existing pm_read and pm_write and create 32-bit register access functions. Change-Id: I916130a229dc7cef8dae1faf00a38501d3939979 Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com> Reviewed-on: https://review.coreboot.org/21749 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin Roth <martinroth@google.com> Reviewed-by: Marc Jones <marc@marcjonesconsulting.com>
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