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author | Maxim Polyakov <max.senia.poliak@gmail.com> | 2019-09-12 13:43:18 +0300 |
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committer | Felix Held <felix-coreboot@felixheld.de> | 2019-09-14 05:47:59 +0000 |
commit | 15b0ab51b9d73f0c7669a367c181dedd675ea6d0 (patch) | |
tree | f3155296b080becefc28fd96e3dbc02ece3779ff /src/northbridge | |
parent | afd7ce680be5a3efd170cc4ce4e4be7f5d27d61e (diff) |
mb/asrock/h110m: configure GPIOs in SuperIO chip
Enables and configures GPIOs in the NCT6791D chip. The values for
registers taken from the superiotool dump.
Change-Id: I5968a6c20cc013697d64bfbe4fc2e7b2390b72b0
Signed-off-by: Maxim Polyakov <max.senia.poliak@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/35378
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Diffstat (limited to 'src/northbridge')
0 files changed, 0 insertions, 0 deletions