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authorFelix Singer <felixsinger@posteo.net>2021-12-29 13:09:09 +0100
committerFelix Singer <felixsinger@posteo.net>2021-12-30 14:23:38 +0000
commit6ed79cbddc22e1c6048f275eae5967b47e2bcfdf (patch)
tree872a9deb8678297ea6c26c7b15c76e4305e05476 /src/northbridge
parentffe40a7a709f3af9f05e5c26c0901c3b4bf6687c (diff)
northbridge/intel/haswell/acpi: Use Printf() for debug prints
Change-Id: I3f500ec46a9046a4e8ca50a85965b8e1225f8a33 Signed-off-by: Felix Singer <felixsinger@posteo.net> Reviewed-on: https://review.coreboot.org/c/coreboot/+/60450 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
Diffstat (limited to 'src/northbridge')
-rw-r--r--src/northbridge/intel/haswell/acpi/ctdp.asl8
1 files changed, 4 insertions, 4 deletions
diff --git a/src/northbridge/intel/haswell/acpi/ctdp.asl b/src/northbridge/intel/haswell/acpi/ctdp.asl
index 565b2d26ec..bc43a81e87 100644
--- a/src/northbridge/intel/haswell/acpi/ctdp.asl
+++ b/src/northbridge/intel/haswell/acpi/ctdp.asl
@@ -99,7 +99,7 @@ Scope (\_SB.PCI0.MCHC)
Return (0)
}
- Debug = "Set TDP Down"
+ Printf ("Set TDP Down")
/* Set CTC */
CTCS = CTCD
@@ -135,7 +135,7 @@ Scope (\_SB.PCI0.MCHC)
Return (0)
}
- Debug = "Set TDP Nominal"
+ Printf ("Set TDP Nominal")
/* Set PL1 */
PL1V = CTDN
@@ -173,7 +173,7 @@ Scope (\_SB.PCI0.MCHC)
Return (0)
}
- Debug = "Enable PL1 Limit"
+ Printf ("Enable PL1 Limit")
/* Set _PPC to LFM */
Local0 = PSSS (LFM_)
@@ -201,7 +201,7 @@ Scope (\_SB.PCI0.MCHC)
Return (0)
}
- Debug = "Disable PL1 Limit"
+ Printf ("Disable PL1 Limit")
/* Clear PL1 CLAMP bit */
PL1C = 0