From 6ed79cbddc22e1c6048f275eae5967b47e2bcfdf Mon Sep 17 00:00:00 2001 From: Felix Singer Date: Wed, 29 Dec 2021 13:09:09 +0100 Subject: northbridge/intel/haswell/acpi: Use Printf() for debug prints Change-Id: I3f500ec46a9046a4e8ca50a85965b8e1225f8a33 Signed-off-by: Felix Singer Reviewed-on: https://review.coreboot.org/c/coreboot/+/60450 Tested-by: build bot (Jenkins) Reviewed-by: HAOUAS Elyes --- src/northbridge/intel/haswell/acpi/ctdp.asl | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) (limited to 'src/northbridge') diff --git a/src/northbridge/intel/haswell/acpi/ctdp.asl b/src/northbridge/intel/haswell/acpi/ctdp.asl index 565b2d26ec..bc43a81e87 100644 --- a/src/northbridge/intel/haswell/acpi/ctdp.asl +++ b/src/northbridge/intel/haswell/acpi/ctdp.asl @@ -99,7 +99,7 @@ Scope (\_SB.PCI0.MCHC) Return (0) } - Debug = "Set TDP Down" + Printf ("Set TDP Down") /* Set CTC */ CTCS = CTCD @@ -135,7 +135,7 @@ Scope (\_SB.PCI0.MCHC) Return (0) } - Debug = "Set TDP Nominal" + Printf ("Set TDP Nominal") /* Set PL1 */ PL1V = CTDN @@ -173,7 +173,7 @@ Scope (\_SB.PCI0.MCHC) Return (0) } - Debug = "Enable PL1 Limit" + Printf ("Enable PL1 Limit") /* Set _PPC to LFM */ Local0 = PSSS (LFM_) @@ -201,7 +201,7 @@ Scope (\_SB.PCI0.MCHC) Return (0) } - Debug = "Disable PL1 Limit" + Printf ("Disable PL1 Limit") /* Clear PL1 CLAMP bit */ PL1C = 0 -- cgit v1.2.3