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authorStefan Reinauer <stepan@coresystems.de>2010-04-15 23:01:59 +0000
committerStefan Reinauer <stepan@openbios.org>2010-04-15 23:01:59 +0000
commite46c1c85c90b6d263f951ab745a9fadd93041111 (patch)
tree4ffefdc0767139b66c48732d44b8a3222eb6b09f /src/northbridge/via
parentc24d383c15f6d31cd1dd5fb8e090db0561421599 (diff)
remove more warnings. move ROOT_COMPLEX selection to fam10
Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5447 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/northbridge/via')
-rw-r--r--src/northbridge/via/cn400/northbridge.c12
-rw-r--r--src/northbridge/via/cn400/vga.c4
2 files changed, 9 insertions, 7 deletions
diff --git a/src/northbridge/via/cn400/northbridge.c b/src/northbridge/via/cn400/northbridge.c
index f867427824..80dcc8d1a9 100644
--- a/src/northbridge/via/cn400/northbridge.c
+++ b/src/northbridge/via/cn400/northbridge.c
@@ -46,8 +46,8 @@ static void memctrl_init(device_t dev)
vlink_dev = dev_find_device(PCI_VENDOR_ID_VIA,
PCI_DEVICE_ID_VIA_CN400_VLINK, 0);
- /* Setup Low Memory Top */
- /* 0x47 == HA(32:25) */
+ /* Setup Low Memory Top */
+ /* 0x47 == HA(32:25) */
/* 0x84/85 == HA(31:20) << 4 | DRAM Granularity */
ranks = pci_read_config8(dev, 0x47);
reg16 = (((u16)(ranks - 1) << 9) & 0xFFF0) | 0x01F0;
@@ -175,6 +175,7 @@ static void ram_resource(device_t dev, unsigned long index,
IORESOURCE_FIXED | IORESOURCE_STORED | IORESOURCE_ASSIGNED;
}
+#ifdef UNUSED_CODE
static void ram_reservation(device_t dev, unsigned long index,
unsigned long base, unsigned long size)
{
@@ -188,6 +189,7 @@ static void ram_reservation(device_t dev, unsigned long index,
res->flags = IORESOURCE_MEM | IORESOURCE_FIXED |
IORESOURCE_STORED | IORESOURCE_ASSIGNED;
}
+#endif
static void tolm_test(void *gp, struct device *dev, struct resource *new)
{
@@ -278,7 +280,7 @@ static unsigned int cn400_domain_scan_bus(device_t dev, unsigned int max)
return max;
}
-static const struct device_operations pci_domain_ops = {
+static struct device_operations pci_domain_ops = {
.read_resources = cn400_domain_read_resources,
.set_resources = cn400_domain_set_resources,
.enable_resources = enable_childrens_resources,
@@ -295,7 +297,7 @@ static void cpu_bus_noop(device_t dev)
{
}
-static const struct device_operations cpu_bus_ops = {
+static struct device_operations cpu_bus_ops = {
.read_resources = cpu_bus_noop,
.set_resources = cpu_bus_noop,
.enable_resources = cpu_bus_noop,
@@ -305,7 +307,7 @@ static const struct device_operations cpu_bus_ops = {
static void enable_dev(struct device *dev)
{
- printk(BIOS_SPEW, "In cn400 enable_dev for device %s.\n", dev_path(dev));
+ printk(BIOS_SPEW, "CN400: enable_dev for device %s.\n", dev_path(dev));
/* Set the operations if it is a special bus type. */
if (dev->path.type == DEVICE_PATH_PCI_DOMAIN) {
diff --git a/src/northbridge/via/cn400/vga.c b/src/northbridge/via/cn400/vga.c
index ac222ff157..c71431c7c4 100644
--- a/src/northbridge/via/cn400/vga.c
+++ b/src/northbridge/via/cn400/vga.c
@@ -58,7 +58,7 @@ static void vga_init(device_t dev)
* This is for compatibility with the VGA ROM's BIOS callbacks.
*/
//memcpy(0xf0000, (0xffffffff - CONFIG_ROM_SIZE - 0xffff), 0x10000);
- memcpy(0xf0000, temp, 0x10000);
+ memcpy((void *)0xf0000, (void *)temp, 0x10000);
printk(BIOS_DEBUG, "Initializing VGA\n");
/* Set memory rate to 200 MHz. */
@@ -103,7 +103,7 @@ static void vga_init(device_t dev)
outb(reg8, SR_DATA);
/* Clear the BOCHS BIOS out of memory, so it doesn't confuse Linux. */
- memset(0xf0000, 0, 0x10000);
+ memset((void *)0xf0000, 0, 0x10000);
#ifdef DEBUG_CN400
printk(BIOS_SPEW, "%s PCI Header Regs::\n", dev_path(dev));