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authorUwe Hermann <uwe@hermann-uwe.de>2010-11-20 20:23:08 +0000
committerUwe Hermann <uwe@hermann-uwe.de>2010-11-20 20:23:08 +0000
commitd773fd370a92a6da2f7dbf91c085eb0df1f6f30d (patch)
treefdaa9bd6278f4772c318d105e92a7cfdbc884521 /src/northbridge/via/vt8601
parent9bd9a90d6a0a47ede6286e2c5599ae7335e4b96a (diff)
Some more DIMM0 related cleanups and deduplication.
- VIA VT8235: Do the shift in smbus_read_byte() as all other chipsets do. - spd.h: Move RC00-RC63 #defines here, they were duplicated in lots of romstage.c files and lots of spd_addr.h files. Don't even bother for those spd_addr.h which aren't even actually used, drop them right away. - Replace various 0x50 hardcoded numbers with DIMM0, 0x51 with DIMM1, and 0xa0 with (DIMM0 << 1) where appropriate. - Various debug.c files: Replace SMBUS_MEM_DEVICE_START with DIMM0, SMBUS_MEM_DEVICE_END with DIMM7, and drop useless SMBUS_MEM_DEVICE_INC. - VIA VX800: Drop unused SMBUS_ADDR_CH* #defines. - VIA VT8623: Do the shift in smbus_read_byte() as all other chipsets do. Then, replace 0xa0 (which now becomes 0x50) with DIMM0. - alix1c/romstage.c, alix2d/romstage.c: Adapt to recent bit shift changes. - Various files: Drop DIMM_SPD_BASE and/or replace it with DIMM0. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Patrick Georgi <patrick@georgi-clan.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6100 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/northbridge/via/vt8601')
-rw-r--r--src/northbridge/via/vt8601/raminit.c16
1 files changed, 9 insertions, 7 deletions
diff --git a/src/northbridge/via/vt8601/raminit.c b/src/northbridge/via/vt8601/raminit.c
index f1ebbe5338..5e7611a3c0 100644
--- a/src/northbridge/via/vt8601/raminit.c
+++ b/src/northbridge/via/vt8601/raminit.c
@@ -34,6 +34,8 @@ it with the version available from LANL.
*/
/* converted to C 9/2003 Ron Minnich */
+#include <spd.h>
+
/* Set to 1 if your DIMMs are PC133 Note that I'm assuming CPU's FSB
* frequency is 133MHz. If your CPU runs at another bus speed, you
* might need to change some of register values.
@@ -178,8 +180,8 @@ static unsigned long spd_module_size(unsigned char slot)
/* we may run out of registers ... */
unsigned int banks, rows, cols;
unsigned int value = 0;
- /* unsigned int module = ((0x50 + slot) << 1) + 1; */
- unsigned int module = 0x50 + slot;
+ /* unsigned int module = ((DIMM0 + slot) << 1) + 1; */
+ unsigned int module = DIMM0 + slot;
/* is the module there? if byte 2 is not 4, then we'll assume it
* is useless.
@@ -220,7 +222,7 @@ static unsigned long spd_module_size(unsigned char slot)
#if 0
static int spd_num_chips(unsigned char slot)
{
- unsigned int module = 0x50 + slot;
+ unsigned int module = DIMM0 + slot;
unsigned int width;
width = smbus_read_byte(module, 13);
@@ -236,13 +238,13 @@ static void sdram_set_spd_registers(const struct mem_controller *ctrl)
unsigned char Trp = 1, Tras = 1, casl = 2, val;
unsigned char timing = 0xe4;
/* read Trp */
- val = smbus_read_byte(0x50, 27);
+ val = smbus_read_byte(DIMM0, 27);
if (val < 2 * T133)
Trp = 1;
- val = smbus_read_byte(0x50, 30);
+ val = smbus_read_byte(DIMM0, 30);
if (val < 5 * T133)
Tras = 0;
- val = smbus_read_byte(0x50, 18);
+ val = smbus_read_byte(DIMM0, 18);
if (val < 8)
casl = 1;
if (val < 4)
@@ -366,7 +368,7 @@ static void sdram_enable(int controllers, const struct mem_controller *ctrl)
continue;
/* Read the row densities */
- size = smbus_read_byte(0x50+slot, 0x1f);
+ size = smbus_read_byte(DIMM0 + slot, 0x1f);
/* Set the MA map type.
*