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authorRonald G. Minnich <rminnich@gmail.com>2004-08-23 20:41:25 +0000
committerRonald G. Minnich <rminnich@gmail.com>2004-08-23 20:41:25 +0000
commit92d159f27d7ccf8165ce7dae2dd616baa6ca544f (patch)
tree693941a70f8697529cdda1239196b70ebdeceb96 /src/northbridge/transmeta/tm5800/cpu_rev.c
parent55a6d461a6b71706cacefb9cbcdc86980b545815 (diff)
dpx114
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1631 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/northbridge/transmeta/tm5800/cpu_rev.c')
-rw-r--r--src/northbridge/transmeta/tm5800/cpu_rev.c15
1 files changed, 15 insertions, 0 deletions
diff --git a/src/northbridge/transmeta/tm5800/cpu_rev.c b/src/northbridge/transmeta/tm5800/cpu_rev.c
new file mode 100644
index 0000000000..b84b0b159c
--- /dev/null
+++ b/src/northbridge/transmeta/tm5800/cpu_rev.c
@@ -0,0 +1,15 @@
+/* this is a shrunken cpuid. */
+
+static unsigned int cpuid(unsigned int op)
+{
+ unsigned int ret;
+ unsigned dummy2,dummy3,dummy4;
+
+ asm volatile (
+ "cpuid"
+ : "=a" (ret), "=b" (dummy2), "=c" (dummy3), "=d" (dummy4)
+ : "a" (op)
+ );
+
+ return ret;
+}