diff options
| author | Duncan Laurie <dlaurie@chromium.org> | 2013-05-09 07:41:58 -0700 |
|---|---|---|
| committer | Alexandru Gagniuc <mr.nuke.me@gmail.com> | 2013-11-24 16:11:04 +0100 |
| commit | fd0bc14844d7ef96781404e4d0a14e522e4f5827 (patch) | |
| tree | 51a161bc485514307ba4fd2983bdc34cddcffece /src/northbridge/intel | |
| parent | 1c097107099201e60be5745b839268752878dc34 (diff) | |
haswell: Update ULT microcode to 0x10
[ 1.503741] microcode: CPU0 sig=0x40651, pf=0x40, revision=0x10
[ 1.510483] microcode: CPU1 sig=0x40651, pf=0x40, revision=0x10
[ 1.517213] microcode: CPU2 sig=0x40651, pf=0x40, revision=0x10
[ 1.523947] microcode: CPU3 sig=0x40651, pf=0x40, revision=0x10
Change-Id: I19ef40b636eebeb8cc29cc0404abbe263ec8eaa7
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/50655
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/4165
Tested-by: build bot (Jenkins)
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Diffstat (limited to 'src/northbridge/intel')
0 files changed, 0 insertions, 0 deletions