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authorElyes HAOUAS <ehaouas@noos.fr>2018-07-08 12:39:34 +0200
committerPatrick Georgi <pgeorgi@google.com>2018-07-09 09:29:53 +0000
commitfd051dc018346e5947d9d8733e269fc5020236ba (patch)
treed12a70629b7565c20643c97ca8a933c4344e5b7b /src/northbridge/intel
parent95bca33efa280e606f7c6d41541cec67c0eb227f (diff)
src/northbridge: Use "foo *bar" instead of "foo* bar"
Change-Id: Iaf86a0c91da089b486bd39518e5c8216163bf8ec Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/27407 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Rudolph <siro@das-labor.org>
Diffstat (limited to 'src/northbridge/intel')
-rw-r--r--src/northbridge/intel/fsp_rangeley/fsp/chipset_fsp_util.c2
-rw-r--r--src/northbridge/intel/fsp_sandybridge/fsp/chipset_fsp_util.c4
-rw-r--r--src/northbridge/intel/gm45/iommu.c2
-rw-r--r--src/northbridge/intel/nehalem/raminit.c16
-rw-r--r--src/northbridge/intel/pineview/raminit.c2
5 files changed, 13 insertions, 13 deletions
diff --git a/src/northbridge/intel/fsp_rangeley/fsp/chipset_fsp_util.c b/src/northbridge/intel/fsp_rangeley/fsp/chipset_fsp_util.c
index ed79f45e8d..999d5a812e 100644
--- a/src/northbridge/intel/fsp_rangeley/fsp/chipset_fsp_util.c
+++ b/src/northbridge/intel/fsp_rangeley/fsp/chipset_fsp_util.c
@@ -43,7 +43,7 @@ static void GetUpdDefaultFromFsp
+ FspInfo->ImageBase);
UpdDataRgnPtr = (UPD_DATA_REGION *)(UINT32)
(VpdDataRgnPtr->PcdUpdRegionOffset + FspInfo->ImageBase);
- memcpy((void*)UpdData, (void*)UpdDataRgnPtr, sizeof(UPD_DATA_REGION));
+ memcpy((void *)UpdData, (void *)UpdDataRgnPtr, sizeof(UPD_DATA_REGION));
}
typedef struct northbridge_intel_fsp_rangeley_config config_t;
diff --git a/src/northbridge/intel/fsp_sandybridge/fsp/chipset_fsp_util.c b/src/northbridge/intel/fsp_sandybridge/fsp/chipset_fsp_util.c
index 888da8ee14..eb316555fb 100644
--- a/src/northbridge/intel/fsp_sandybridge/fsp/chipset_fsp_util.c
+++ b/src/northbridge/intel/fsp_sandybridge/fsp/chipset_fsp_util.c
@@ -33,7 +33,7 @@ static void GetUpdDefaultFromFsp (FSP_INFO_HEADER *FspInfo, UPD_DATA_REGION *U
UPD_DATA_REGION *UpdDataRgnPtr;
VpdDataRgnPtr = (VPD_DATA_REGION *)(UINT32)(FspInfo->CfgRegionOffset + FspInfo->ImageBase);
UpdDataRgnPtr = (UPD_DATA_REGION *)(UINT32)(VpdDataRgnPtr->PcdUpdRegionOffset + FspInfo->ImageBase);
- memcpy((void*)UpdData, (void*)UpdDataRgnPtr, sizeof(UPD_DATA_REGION));
+ memcpy((void *)UpdData, (void *)UpdDataRgnPtr, sizeof(UPD_DATA_REGION));
}
static void ConfigureDefaultUpdData(UPD_DATA_REGION *UpdData)
@@ -70,7 +70,7 @@ void chipset_fsp_early_init(FSP_INIT_PARAMS *FspInitParams,
UPD_DATA_REGION *fsp_upd_data = pFspRtBuffer->Common.UpdDataRgnPtr;
#else
MEM_CONFIG MemoryConfig;
- memset((void*)&MemoryConfig, 0, sizeof(MEM_CONFIG));
+ memset((void *)&MemoryConfig, 0, sizeof(MEM_CONFIG));
#endif
FspInitParams->NvsBufferPtr = NULL;
diff --git a/src/northbridge/intel/gm45/iommu.c b/src/northbridge/intel/gm45/iommu.c
index 77aba94b4a..0108116666 100644
--- a/src/northbridge/intel/gm45/iommu.c
+++ b/src/northbridge/intel/gm45/iommu.c
@@ -54,7 +54,7 @@ void init_iommu()
u8 cmd = pci_read_config8(igd, PCI_COMMAND);
cmd |= PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY;
pci_write_config8(igd, PCI_COMMAND, cmd);
- void* bar = (void*)pci_read_config32(igd, PCI_BASE_ADDRESS_0);
+ void *bar = (void *)pci_read_config32(igd, PCI_BASE_ADDRESS_0);
/* clear GTT, 2MB is enough (and should be safe) */
memset(bar, 0, 2<<20);
diff --git a/src/northbridge/intel/nehalem/raminit.c b/src/northbridge/intel/nehalem/raminit.c
index 94d9af8855..dcf9b7b51f 100644
--- a/src/northbridge/intel/nehalem/raminit.c
+++ b/src/northbridge/intel/nehalem/raminit.c
@@ -1786,7 +1786,7 @@ static void wait_heci_cb_avail(int len)
csr.csr.buffer_read_ptr));
}
-static void send_heci_packet(struct mei_header *head, u32 * payload)
+static void send_heci_packet(struct mei_header *head, u32 *payload)
{
int len = (head->length + 3) / 4;
int i;
@@ -1803,7 +1803,7 @@ static void send_heci_packet(struct mei_header *head, u32 * payload)
}
static void
-send_heci_message(u8 * msg, int len, u8 hostaddress, u8 clientaddress)
+send_heci_message(u8 *msg, int len, u8 hostaddress, u8 clientaddress)
{
struct mei_header head;
int maxlen;
@@ -1830,8 +1830,8 @@ send_heci_message(u8 * msg, int len, u8 hostaddress, u8 clientaddress)
/* FIXME: Add timeout. */
static int
-recv_heci_packet(struct raminfo *info, struct mei_header *head, u32 * packet,
- u32 * packet_size)
+recv_heci_packet(struct raminfo *info, struct mei_header *head, u32 *packet,
+ u32 *packet_size)
{
union {
struct mei_csr csr;
@@ -1877,7 +1877,7 @@ recv_heci_packet(struct raminfo *info, struct mei_header *head, u32 * packet,
/* FIXME: Add timeout. */
static int
-recv_heci_message(struct raminfo *info, u32 * message, u32 * message_size)
+recv_heci_message(struct raminfo *info, u32 *message, u32 *message_size)
{
struct mei_header head;
int current_position;
@@ -2291,9 +2291,9 @@ static int validate_state(enum state *in)
}
static void
-do_fsm(enum state *state, u16 * counter,
- u8 fail_mask, int margin, int uplimit,
- u8 * res_low, u8 * res_high, u8 val)
+do_fsm(enum state *state, u16 *counter,
+ u8 fail_mask, int margin, int uplimit,
+ u8 *res_low, u8 *res_high, u8 val)
{
int lane;
diff --git a/src/northbridge/intel/pineview/raminit.c b/src/northbridge/intel/pineview/raminit.c
index f31f032a71..66f0a10419 100644
--- a/src/northbridge/intel/pineview/raminit.c
+++ b/src/northbridge/intel/pineview/raminit.c
@@ -1845,7 +1845,7 @@ static u8 sampledqs(u32 dqshighaddr, u32 strobeaddr, u8 highlow, u8 count)
MCHBAR8(0x5d8) = MCHBAR8(0x5d8) | 0x2;
hpet_udelay(1);
barrier();
- strobedata = read32((void*)strobeaddr);
+ strobedata = read32((void *)strobeaddr);
barrier();
hpet_udelay(1);