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authorElyes HAOUAS <ehaouas@noos.fr>2019-06-24 19:22:58 +0200
committerMartin Roth <martinroth@google.com>2019-06-28 19:20:09 +0000
commite5845bfb2d676b358fdaa1bc754de6101c8dceb7 (patch)
treebe121e3f9e1b0151595fff0587ecfe1c03d06a53 /src/northbridge/intel
parent85d3b40a19358c4014eceaea3204feece8b15edd (diff)
{soc,northbridge}/Kconfig: Remove unused CACHE_MRC_SIZE_KB
Change-Id: Ie922832bc7641a44a53c0cda8d808579c66420b5 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/33743 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
Diffstat (limited to 'src/northbridge/intel')
-rw-r--r--src/northbridge/intel/haswell/Kconfig4
-rw-r--r--src/northbridge/intel/sandybridge/Kconfig4
2 files changed, 0 insertions, 8 deletions
diff --git a/src/northbridge/intel/haswell/Kconfig b/src/northbridge/intel/haswell/Kconfig
index e1067c5949..3678cb803d 100644
--- a/src/northbridge/intel/haswell/Kconfig
+++ b/src/northbridge/intel/haswell/Kconfig
@@ -55,10 +55,6 @@ config MMCONF_BASE_ADDRESS
hex
default 0xf0000000
-config CACHE_MRC_SIZE_KB
- int
- default 512
-
config DCACHE_RAM_BASE
hex
default 0xff7c0000
diff --git a/src/northbridge/intel/sandybridge/Kconfig b/src/northbridge/intel/sandybridge/Kconfig
index 59cf92c0ee..53725cafb4 100644
--- a/src/northbridge/intel/sandybridge/Kconfig
+++ b/src/northbridge/intel/sandybridge/Kconfig
@@ -64,10 +64,6 @@ config VGA_BIOS_ID
string
default "8086,0106"
-config CACHE_MRC_SIZE_KB
- int
- default 512
-
config BOOTBLOCK_NORTHBRIDGE_INIT
string
default "northbridge/intel/sandybridge/bootblock.c"