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authorElyes Haouas <ehaouas@noos.fr>2022-12-03 13:33:48 +0100
committerFelix Held <felix-coreboot@felixheld.de>2022-12-06 19:46:17 +0000
commita361d35b8d5aa83fb551d47f2c095665b3b0fdeb (patch)
treef8fd1ab5734b864d1baf4160c5ca61260587892c /src/northbridge/intel
parent9a83eae71ef838037024f5316b0e745bc2810cd5 (diff)
nb/intel/pineview: Use read32p()
Change-Id: Ie2b1131d7db4b81bd6eb2df7a5ba8a6e8b54539b Signed-off-by: Elyes Haouas <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/70289 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Diffstat (limited to 'src/northbridge/intel')
-rw-r--r--src/northbridge/intel/pineview/raminit.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/northbridge/intel/pineview/raminit.c b/src/northbridge/intel/pineview/raminit.c
index eda3a65f43..3699173ea0 100644
--- a/src/northbridge/intel/pineview/raminit.c
+++ b/src/northbridge/intel/pineview/raminit.c
@@ -1641,7 +1641,7 @@ sdram_jedec(struct sysinfo *s, u8 rank, u8 jmode, u16 jval)
reg32 = jval << 3;
reg32 |= rank * (1 << 27);
mchbar_clrsetbits8(C0JEDEC, 0x3e, jmode);
- read32((void *)reg32);
+ read32p(reg32);
barrier();
hpet_udelay(1); // 1us
}
@@ -1849,7 +1849,7 @@ static u8 sampledqs(u32 dqshighaddr, u32 strobeaddr, u8 highlow, u8 count)
mchbar_setbits8(C0RSTCTL, 1 << 1);
hpet_udelay(1);
barrier();
- read32((void *)strobeaddr);
+ read32p(strobeaddr);
barrier();
hpet_udelay(1);