diff options
| author | Angel Pons <th3fanbus@gmail.com> | 2022-05-06 23:22:11 +0200 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2022-12-16 17:13:18 +0000 |
| commit | 9c8c858e687e03e19773ea84fea021301de0e933 (patch) | |
| tree | 824d5907840413a56e5152bc9b54b75eab30970d /src/northbridge/intel | |
| parent | 70c618547632924a4eae15023f14ab22469a26e0 (diff) | |
sb/intel/lynxpoint: Add native thermal init
Implement native thermal initialisation for Lynx Point. This is only
needed when MRC.bin is not used.
Change-Id: I4a67a3092d0c2e56bfdacb513a899ef838193cbd
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/64180
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/northbridge/intel')
| -rw-r--r-- | src/northbridge/intel/haswell/native_raminit/raminit_native.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/northbridge/intel/haswell/native_raminit/raminit_native.c b/src/northbridge/intel/haswell/native_raminit/raminit_native.c index ef61d4ee09..dd1f1ec14e 100644 --- a/src/northbridge/intel/haswell/native_raminit/raminit_native.c +++ b/src/northbridge/intel/haswell/native_raminit/raminit_native.c @@ -16,6 +16,7 @@ static bool early_init_native(int s3resume) /** TODO: CPU replacement check must be skipped in warm boots and S3 resumes **/ const bool cpu_replaced = !s3resume && intel_early_me_cpu_replacement_check(); + early_thermal_init(); early_usb_init(); if (!CONFIG(INTEL_LYNXPOINT_LP)) |