summaryrefslogtreecommitdiff
path: root/src/northbridge/intel
diff options
context:
space:
mode:
authorArthur Heymans <arthur@aheymans.xyz>2018-06-03 10:29:07 +0200
committerArthur Heymans <arthur@aheymans.xyz>2018-06-05 07:48:12 +0000
commit7a8205ba353fdf7063791926f82f84c7a9491c35 (patch)
tree95b09652ab9071f2e97008cc804c7df7fd50242e /src/northbridge/intel
parent711fb811acd403301bb59499071a82ecf112f687 (diff)
cpu/intel/car/core2: Prepare for POSTCAR_STAGE support
Split of the model_6ex cache as ram to support POSTCAR_STAGE, which is also needed for future C_ENVIRONMENT_BOOTBLOCK. When using POSTCAR_STAGE the p4-netburst/exit_car.S is using since it is identical. Change-Id: Ibe9f065fdf1d702b73333ea7bb32daca15ba1293 Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/26783 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Diffstat (limited to 'src/northbridge/intel')
0 files changed, 0 insertions, 0 deletions