diff options
| author | Angel Pons <th3fanbus@gmail.com> | 2020-07-03 14:14:30 +0200 |
|---|---|---|
| committer | Angel Pons <th3fanbus@gmail.com> | 2020-07-12 09:54:50 +0000 |
| commit | 6eea191511ad63017eafa22d5363a39ac99ab1db (patch) | |
| tree | eadc730127331a8bf9454696146d18f7dc042d61 /src/northbridge/intel | |
| parent | 517bc99db1ece3f3904534e9f0d5d3b28eb4815b (diff) | |
haswell: Make `copy_spd` a weak function
Instead of using function pointers, we can use weak functions. So, drop
the pointer from `romstage_params`, leaving `pei_data` as the only
remaining member. This will be cleaned up in a follow-up commit.
Change-Id: I3b17d21ea7a650734119a5cab4892fcb158b589d
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/43105
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'src/northbridge/intel')
| -rw-r--r-- | src/northbridge/intel/haswell/haswell.h | 1 | ||||
| -rw-r--r-- | src/northbridge/intel/haswell/raminit.h | 3 | ||||
| -rw-r--r-- | src/northbridge/intel/haswell/romstage.c | 8 |
3 files changed, 9 insertions, 3 deletions
diff --git a/src/northbridge/intel/haswell/haswell.h b/src/northbridge/intel/haswell/haswell.h index 7fb24c8935..24d773f368 100644 --- a/src/northbridge/intel/haswell/haswell.h +++ b/src/northbridge/intel/haswell/haswell.h @@ -192,7 +192,6 @@ void intel_northbridge_haswell_finalize_smm(void); struct pei_data; struct romstage_params { struct pei_data *pei_data; - void (*copy_spd)(struct pei_data *peid); }; void romstage_common(const struct romstage_params *params); void mb_late_romstage_setup(void); /* optional */ diff --git a/src/northbridge/intel/haswell/raminit.h b/src/northbridge/intel/haswell/raminit.h index 562c24d5b6..920ee0fabd 100644 --- a/src/northbridge/intel/haswell/raminit.h +++ b/src/northbridge/intel/haswell/raminit.h @@ -5,6 +5,9 @@ #include "pei_data.h" +/* Optional function to copy SPD data for on-board memory */ +void copy_spd(struct pei_data *peid); + void sdram_initialize(struct pei_data *pei_data); void setup_sdram_meminfo(struct pei_data *pei_data); int fixup_haswell_errata(void); diff --git a/src/northbridge/intel/haswell/romstage.c b/src/northbridge/intel/haswell/romstage.c index ae9d707d90..00f5f47938 100644 --- a/src/northbridge/intel/haswell/romstage.c +++ b/src/northbridge/intel/haswell/romstage.c @@ -13,6 +13,11 @@ #include <southbridge/intel/lynxpoint/pch.h> #include <southbridge/intel/lynxpoint/me.h> +/* Copy SPD data for on-board memory */ +void __weak copy_spd(struct pei_data *peid) +{ +} + void __weak mb_late_romstage_setup(void) { } @@ -53,8 +58,7 @@ void romstage_common(const struct romstage_params *params) report_platform_info(); - if (params->copy_spd != NULL) - params->copy_spd(params->pei_data); + copy_spd(params->pei_data); sdram_initialize(params->pei_data); |