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authorElyes HAOUAS <ehaouas@noos.fr>2018-08-09 18:55:58 +0200
committerMartin Roth <martinroth@google.com>2018-08-10 21:25:53 +0000
commit3d45000c9cab2e5e5cac11a0a6af9abdce8aa80d (patch)
tree7b5096ca1f81fecf70418020aba184e446f995e0 /src/northbridge/intel
parent1895838e7a3807a6fce324f0dfed193a3821f6df (diff)
src: Fix typo
Change-Id: I689c5663ef59861f79b68220abd146144f7618de Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/27988 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/northbridge/intel')
-rw-r--r--src/northbridge/intel/gm45/raminit.c4
-rw-r--r--src/northbridge/intel/pineview/raminit.c2
-rw-r--r--src/northbridge/intel/x4x/raminit_tables.c2
3 files changed, 4 insertions, 4 deletions
diff --git a/src/northbridge/intel/gm45/raminit.c b/src/northbridge/intel/gm45/raminit.c
index 08f954d057..03f617c6a3 100644
--- a/src/northbridge/intel/gm45/raminit.c
+++ b/src/northbridge/intel/gm45/raminit.c
@@ -869,7 +869,7 @@ static void configure_dram_control_mode(const timings_t *const timings, const di
static void rcomp_initialization(const stepping_t stepping, const int sff)
{
- /* Programm RCOMP codes. */
+ /* Program RCOMP codes. */
if (sff)
die("SFF platform unsupported in RCOMP initialization.\n");
/* Values are for DDR3. */
@@ -1825,7 +1825,7 @@ void raminit(sysinfo_t *const sysinfo, const int s3resume)
/* Some last optimizations. */
dram_optimizations(timings, dimms);
- /* Mark raminit beeing finished. :-) */
+ /* Mark raminit being finished. :-) */
u8 tmp8 = pci_read_config8(PCI_DEV(0, 0x1f, 0), 0xa2) & ~(1 << 7);
pci_write_config8(PCI_DEV(0, 0x1f, 0), 0xa2, tmp8);
diff --git a/src/northbridge/intel/pineview/raminit.c b/src/northbridge/intel/pineview/raminit.c
index 66f0a10419..2a1e34cea2 100644
--- a/src/northbridge/intel/pineview/raminit.c
+++ b/src/northbridge/intel/pineview/raminit.c
@@ -1972,7 +1972,7 @@ static void sdram_rcven(struct sysinfo *s)
MCHBAR32(0x248) = (MCHBAR32(0x248) & ~0xf0000)
| (curcoarse << 16);
if (curcoarse == 0) {
- PRINTK_DEBUG("Error: DQS didnt hit 0\n");
+ PRINTK_DEBUG("Error: DQS did not hit 0\n");
break;
}
}
diff --git a/src/northbridge/intel/x4x/raminit_tables.c b/src/northbridge/intel/x4x/raminit_tables.c
index 401af15cd8..ebd1562bde 100644
--- a/src/northbridge/intel/x4x/raminit_tables.c
+++ b/src/northbridge/intel/x4x/raminit_tables.c
@@ -332,7 +332,7 @@ const u32 ddr3_c2_tab[2][3][6][2] = { /* [n-mode][ddr3 freq][CAS][reg] */
{0x0189, 0x000aaa}, /* CAS = 5 */
{0x0189, 0x101aaa}, /* CAS = 6 */
{0x0000, 0x000000}, /* CAS = 7 - Not supported */
- {0x0000, 0x000000} /* CAS = 8 - Not suppported */
+ {0x0000, 0x000000} /* CAS = 8 - Not supported */
},
{ /* DDR3 1067 */
{0x0000, 0x000000}, /* CAS = 5 - Not supported */