summaryrefslogtreecommitdiff
path: root/src/northbridge/intel
diff options
context:
space:
mode:
authorVagiz Trakhanov <rakkin@autistici.org>2017-10-17 18:04:55 +0000
committerMartin Roth <martinroth@google.com>2017-10-22 02:20:34 +0000
commit177f7731aa459e1171a7b118e884a40a90a5da60 (patch)
treecb541d13985321ab44248812f49c0e06208f12dc /src/northbridge/intel
parentcc9c0cbc7eca6f423f83583a80dc5bd83c54ffaa (diff)
superio/ite/common: Make PECI a thermal mode
Instead of setting "peci_tmpin" in the devicetree, THERMAL_PECI is now a mode of TMPIN like THERMAL_RESISTOR and THERMAL_DIODE. Since the logic to set temperature offsets and limits is in the function that sets thermal modes, it makes sense to treat PECI as yet another mode. As of this commit, there are no boards that actually use peci_tmpin from ite/common. There are three boards that have a similar device tree option, but those boards use it8772f, which implements all superio functions on its own. The first user will probably be Gigabyte GA-Z77-DS3H. Change-Id: I39da50c124ad767f8681302733cf004622975e81 Signed-off-by: Vagiz Trakhanov <rakkin@autistici.org> Reviewed-on: https://review.coreboot.org/22076 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Diffstat (limited to 'src/northbridge/intel')
0 files changed, 0 insertions, 0 deletions