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authorElyes HAOUAS <ehaouas@noos.fr>2019-03-12 10:40:08 +0100
committerKyösti Mälkki <kyosti.malkki@gmail.com>2019-03-13 07:29:01 +0000
commit11949990a8afa8b2dc7cb432d6611c01d96e49d5 (patch)
treebe7fee019907f2971f575c3474793ebec6009914 /src/northbridge/intel
parent285ae69e5177c80686a3c82094b4bf212e7dede6 (diff)
src: Drop unused 'include <arch/ioapic.h>'
Change-Id: I1341f90230f318ac81a4aea24872ff272adad1eb Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/31856 Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/northbridge/intel')
-rw-r--r--src/northbridge/intel/fsp_rangeley/acpi/hostbridge.asl2
1 files changed, 0 insertions, 2 deletions
diff --git a/src/northbridge/intel/fsp_rangeley/acpi/hostbridge.asl b/src/northbridge/intel/fsp_rangeley/acpi/hostbridge.asl
index 0c92da677e..cb0d2a43ce 100644
--- a/src/northbridge/intel/fsp_rangeley/acpi/hostbridge.asl
+++ b/src/northbridge/intel/fsp_rangeley/acpi/hostbridge.asl
@@ -14,8 +14,6 @@
* GNU General Public License for more details.
*/
-#include <arch/ioapic.h>
-
Name(_HID,EISAID("PNP0A08")) // PCIe
Name(_CID,EISAID("PNP0A03")) // PCI