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authorStefan Reinauer <stepan@coresystems.de>2009-06-30 15:17:49 +0000
committerStefan Reinauer <stepan@openbios.org>2009-06-30 15:17:49 +0000
commit0867062412dd4bfe5a556e5f3fd85ba5b682d79b (patch)
tree81ca5db12b8567b48daaa23a541bfb8a5dc011f8 /src/northbridge/intel
parent9702b6bf7ec5a4fb16934f1cf2724480e2460c89 (diff)
This patch unifies the use of config options in v2 to all start with CONFIG_
It's basically done with the following script and some manual fixup: VARS=`grep ^define src/config/Options.lb | cut -f2 -d\ | grep -v ^CONFIG | grep -v ^COREBOOT |grep -v ^CC` for VAR in $VARS; do find . -name .svn -prune -o -type f -exec perl -pi -e "s/(^|[^0-9a-zA-Z_]+)$VAR($|[^0-9a-zA-Z_]+)/\1CONFIG_$VAR\2/g" {} \; done Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Ronald G. Minnich <rminnich@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4381 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/northbridge/intel')
-rw-r--r--src/northbridge/intel/e7501/Config.lb4
-rw-r--r--src/northbridge/intel/e7501/northbridge.c4
-rw-r--r--src/northbridge/intel/e7520/Config.lb6
-rw-r--r--src/northbridge/intel/e7520/northbridge.c4
-rw-r--r--src/northbridge/intel/e7525/Config.lb6
-rw-r--r--src/northbridge/intel/e7525/northbridge.c4
-rw-r--r--src/northbridge/intel/i3100/Config.lb4
-rw-r--r--src/northbridge/intel/i3100/northbridge.c4
-rw-r--r--src/northbridge/intel/i440bx/Config.lb4
-rw-r--r--src/northbridge/intel/i440bx/northbridge.c4
-rw-r--r--src/northbridge/intel/i82810/Config.lb4
-rw-r--r--src/northbridge/intel/i82810/northbridge.c4
-rw-r--r--src/northbridge/intel/i82830/Config.lb4
-rw-r--r--src/northbridge/intel/i82830/northbridge.c4
-rw-r--r--src/northbridge/intel/i855gme/Config.lb4
-rw-r--r--src/northbridge/intel/i855gme/northbridge.c4
-rw-r--r--src/northbridge/intel/i855pm/Config.lb4
-rw-r--r--src/northbridge/intel/i855pm/northbridge.c4
-rw-r--r--src/northbridge/intel/i945/Config.lb4
-rw-r--r--src/northbridge/intel/i945/northbridge.c6
20 files changed, 43 insertions, 43 deletions
diff --git a/src/northbridge/intel/e7501/Config.lb b/src/northbridge/intel/e7501/Config.lb
index 2a8095f692..72e903b9b1 100644
--- a/src/northbridge/intel/e7501/Config.lb
+++ b/src/northbridge/intel/e7501/Config.lb
@@ -1,7 +1,7 @@
-uses HAVE_HIGH_TABLES
+uses CONFIG_HAVE_HIGH_TABLES
config chip.h
object northbridge.o
-default HAVE_HIGH_TABLES=1
+default CONFIG_HAVE_HIGH_TABLES=1
diff --git a/src/northbridge/intel/e7501/northbridge.c b/src/northbridge/intel/e7501/northbridge.c
index 7168bf3112..06a68e1e47 100644
--- a/src/northbridge/intel/e7501/northbridge.c
+++ b/src/northbridge/intel/e7501/northbridge.c
@@ -65,7 +65,7 @@ static uint32_t find_pci_tolm(struct bus *bus)
return tolm;
}
-#if HAVE_HIGH_TABLES==1
+#if CONFIG_HAVE_HIGH_TABLES==1
#define HIGH_TABLES_SIZE 64 // maximum size of high tables in KB
extern uint64_t high_tables_base, high_tables_size;
#endif
@@ -146,7 +146,7 @@ static void pci_domain_set_resources(device_t dev)
(remaplimitk + 64*1024) - remapbasek);
}
-#if HAVE_HIGH_TABLES==1
+#if CONFIG_HAVE_HIGH_TABLES==1
/* Leave some space for ACPI, PIRQ and MP tables */
high_tables_base = (tolmk - HIGH_TABLES_SIZE) * 1024;
high_tables_size = HIGH_TABLES_SIZE * 1024;
diff --git a/src/northbridge/intel/e7520/Config.lb b/src/northbridge/intel/e7520/Config.lb
index 03a78974d4..dbbd3aae24 100644
--- a/src/northbridge/intel/e7520/Config.lb
+++ b/src/northbridge/intel/e7520/Config.lb
@@ -1,4 +1,4 @@
-uses HAVE_HIGH_TABLES
+uses CONFIG_HAVE_HIGH_TABLES
config chip.h
driver northbridge.o
@@ -7,10 +7,10 @@ driver pciexp_porta1.o
driver pciexp_portb.o
driver pciexp_portc.o
-default HAVE_HIGH_TABLES=1
+default CONFIG_HAVE_HIGH_TABLES=1
makerule raminit_test
depends "$(TOP)/src/northbridge/intel/e7520/raminit_test.c"
depends "$(TOP)/src/northbridge/intel/e7520/raminit.c"
- action "$(HOSTCC) $(HOSTCFLAGS) $(CPUFLAGS) -Wno-unused-function -I$(TOP)/src/include -g $< -o $@"
+ action "$(CONFIG_HOSTCC) $(HOSTCFLAGS) $(CPUFLAGS) -Wno-unused-function -I$(TOP)/src/include -g $< -o $@"
end
diff --git a/src/northbridge/intel/e7520/northbridge.c b/src/northbridge/intel/e7520/northbridge.c
index f2b2a0f3a0..47e6266aa6 100644
--- a/src/northbridge/intel/e7520/northbridge.c
+++ b/src/northbridge/intel/e7520/northbridge.c
@@ -76,7 +76,7 @@ static uint32_t find_pci_tolm(struct bus *bus)
return tolm;
}
-#if HAVE_HIGH_TABLES==1
+#if CONFIG_HAVE_HIGH_TABLES==1
#define HIGH_TABLES_SIZE 64 // maximum size of high tables in KB
extern uint64_t high_tables_base, high_tables_size;
#endif
@@ -169,7 +169,7 @@ static void pci_domain_set_resources(device_t dev)
(remaplimitk + 64*1024) - remapbasek);
}
-#if HAVE_HIGH_TABLES==1
+#if CONFIG_HAVE_HIGH_TABLES==1
/* Leave some space for ACPI, PIRQ and MP tables */
high_tables_base = (tolmk - HIGH_TABLES_SIZE) * 1024;
high_tables_size = HIGH_TABLES_SIZE * 1024;
diff --git a/src/northbridge/intel/e7525/Config.lb b/src/northbridge/intel/e7525/Config.lb
index 07930ff434..fc3253d0ff 100644
--- a/src/northbridge/intel/e7525/Config.lb
+++ b/src/northbridge/intel/e7525/Config.lb
@@ -1,4 +1,4 @@
-uses HAVE_HIGH_TABLES
+uses CONFIG_HAVE_HIGH_TABLES
config chip.h
driver northbridge.o
@@ -7,10 +7,10 @@ driver pciexp_porta1.o
driver pciexp_portb.o
driver pciexp_portc.o
-default HAVE_HIGH_TABLES=1
+default CONFIG_HAVE_HIGH_TABLES=1
makerule raminit_test
depends "$(TOP)/src/northbridge/intel/e7525/raminit_test.c"
depends "$(TOP)/src/northbridge/intel/e7525/raminit.c"
- action "$(HOSTCC) $(HOSTCFLAGS) $(CPUFLAGS) -Wno-unused-function -I$(TOP)/src/include -g $< -o $@"
+ action "$(CONFIG_HOSTCC) $(HOSTCFLAGS) $(CPUFLAGS) -Wno-unused-function -I$(TOP)/src/include -g $< -o $@"
end
diff --git a/src/northbridge/intel/e7525/northbridge.c b/src/northbridge/intel/e7525/northbridge.c
index 7900129ec2..65404d6bf3 100644
--- a/src/northbridge/intel/e7525/northbridge.c
+++ b/src/northbridge/intel/e7525/northbridge.c
@@ -76,7 +76,7 @@ static uint32_t find_pci_tolm(struct bus *bus)
return tolm;
}
-#if HAVE_HIGH_TABLES==1
+#if CONFIG_HAVE_HIGH_TABLES==1
#define HIGH_TABLES_SIZE 64 // maximum size of high tables in KB
extern uint64_t high_tables_base, high_tables_size;
#endif
@@ -169,7 +169,7 @@ static void pci_domain_set_resources(device_t dev)
(remaplimitk + 64*1024) - remapbasek);
}
-#if HAVE_HIGH_TABLES==1
+#if CONFIG_HAVE_HIGH_TABLES==1
/* Leave some space for ACPI, PIRQ and MP tables */
high_tables_base = (tolmk - HIGH_TABLES_SIZE) * 1024;
high_tables_size = HIGH_TABLES_SIZE * 1024;
diff --git a/src/northbridge/intel/i3100/Config.lb b/src/northbridge/intel/i3100/Config.lb
index 1534605dc0..6d0fa6f5be 100644
--- a/src/northbridge/intel/i3100/Config.lb
+++ b/src/northbridge/intel/i3100/Config.lb
@@ -17,11 +17,11 @@
## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
##
-uses HAVE_HIGH_TABLES
+uses CONFIG_HAVE_HIGH_TABLES
config chip.h
driver northbridge.o
driver pciexp_porta.o
-default HAVE_HIGH_TABLES=1
+default CONFIG_HAVE_HIGH_TABLES=1
diff --git a/src/northbridge/intel/i3100/northbridge.c b/src/northbridge/intel/i3100/northbridge.c
index 928fe94c73..205e47db50 100644
--- a/src/northbridge/intel/i3100/northbridge.c
+++ b/src/northbridge/intel/i3100/northbridge.c
@@ -97,7 +97,7 @@ static u32 find_pci_tolm(struct bus *bus)
return tolm;
}
-#if HAVE_HIGH_TABLES==1
+#if CONFIG_HAVE_HIGH_TABLES==1
#define HIGH_TABLES_SIZE 64 // maximum size of high tables in KB
extern uint64_t high_tables_base, high_tables_size;
#endif
@@ -190,7 +190,7 @@ static void pci_domain_set_resources(device_t dev)
(remaplimitk + 64*1024) - remapbasek);
}
-#if HAVE_HIGH_TABLES==1
+#if CONFIG_HAVE_HIGH_TABLES==1
/* Leave some space for ACPI, PIRQ and MP tables */
high_tables_base = (tolmk - HIGH_TABLES_SIZE) * 1024;
high_tables_size = HIGH_TABLES_SIZE * 1024;
diff --git a/src/northbridge/intel/i440bx/Config.lb b/src/northbridge/intel/i440bx/Config.lb
index c9a26b08b3..a27625ee41 100644
--- a/src/northbridge/intel/i440bx/Config.lb
+++ b/src/northbridge/intel/i440bx/Config.lb
@@ -18,10 +18,10 @@
## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
##
-uses HAVE_HIGH_TABLES
+uses CONFIG_HAVE_HIGH_TABLES
config chip.h
driver northbridge.o
-default HAVE_HIGH_TABLES=1
+default CONFIG_HAVE_HIGH_TABLES=1
diff --git a/src/northbridge/intel/i440bx/northbridge.c b/src/northbridge/intel/i440bx/northbridge.c
index 31b5dc0575..34c868e0f3 100644
--- a/src/northbridge/intel/i440bx/northbridge.c
+++ b/src/northbridge/intel/i440bx/northbridge.c
@@ -90,7 +90,7 @@ static uint32_t find_pci_tolm(struct bus *bus)
return tolm;
}
-#if HAVE_HIGH_TABLES==1
+#if CONFIG_HAVE_HIGH_TABLES==1
#define HIGH_TABLES_SIZE 64 // maximum size of high tables in KB
extern uint64_t high_tables_base, high_tables_size;
#endif
@@ -131,7 +131,7 @@ static void pci_domain_set_resources(device_t dev)
ram_resource(dev, idx++, 0, 640);
ram_resource(dev, idx++, 768, tolmk - 768);
-#if HAVE_HIGH_TABLES==1
+#if CONFIG_HAVE_HIGH_TABLES==1
/* Leave some space for ACPI, PIRQ and MP tables */
high_tables_base = (tomk - HIGH_TABLES_SIZE) * 1024;
high_tables_size = HIGH_TABLES_SIZE * 1024;
diff --git a/src/northbridge/intel/i82810/Config.lb b/src/northbridge/intel/i82810/Config.lb
index 04375d89c1..2cc66fc2c0 100644
--- a/src/northbridge/intel/i82810/Config.lb
+++ b/src/northbridge/intel/i82810/Config.lb
@@ -18,10 +18,10 @@
## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
##
-uses HAVE_HIGH_TABLES
+uses CONFIG_HAVE_HIGH_TABLES
config chip.h
driver northbridge.o
-default HAVE_HIGH_TABLES=1
+default CONFIG_HAVE_HIGH_TABLES=1
diff --git a/src/northbridge/intel/i82810/northbridge.c b/src/northbridge/intel/i82810/northbridge.c
index 40c8ee0e69..4b3c321963 100644
--- a/src/northbridge/intel/i82810/northbridge.c
+++ b/src/northbridge/intel/i82810/northbridge.c
@@ -122,7 +122,7 @@ static int translate_i82810_to_mb[] = {
/* MB */0, 8, 0, 16, 16, 24, 32, 32, 48, 64, 64, 96, 128, 128, 192, 256,
};
-#if HAVE_HIGH_TABLES==1
+#if CONFIG_HAVE_HIGH_TABLES==1
#define HIGH_TABLES_SIZE 64 // maximum size of high tables in KB
extern uint64_t high_tables_base, high_tables_size;
#endif
@@ -172,7 +172,7 @@ static void pci_domain_set_resources(device_t dev)
ram_resource(dev, idx++, 0, 640);
ram_resource(dev, idx++, 768, tolmk - 768);
-#if HAVE_HIGH_TABLES==1
+#if CONFIG_HAVE_HIGH_TABLES==1
/* Leave some space for ACPI, PIRQ and MP tables */
high_tables_base = (tomk - HIGH_TABLES_SIZE) * 1024;
high_tables_size = HIGH_TABLES_SIZE * 1024;
diff --git a/src/northbridge/intel/i82830/Config.lb b/src/northbridge/intel/i82830/Config.lb
index 863c867666..c6b7afd3d1 100644
--- a/src/northbridge/intel/i82830/Config.lb
+++ b/src/northbridge/intel/i82830/Config.lb
@@ -18,11 +18,11 @@
## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
##
-uses HAVE_HIGH_TABLES
+uses CONFIG_HAVE_HIGH_TABLES
config chip.h
driver northbridge.o
driver vga.o
-default HAVE_HIGH_TABLES=1
+default CONFIG_HAVE_HIGH_TABLES=1
diff --git a/src/northbridge/intel/i82830/northbridge.c b/src/northbridge/intel/i82830/northbridge.c
index bf79ecdca1..9f6ba71d41 100644
--- a/src/northbridge/intel/i82830/northbridge.c
+++ b/src/northbridge/intel/i82830/northbridge.c
@@ -107,7 +107,7 @@ static uint32_t find_pci_tolm(struct bus *bus)
return tolm;
}
-#if HAVE_HIGH_TABLES==1
+#if CONFIG_HAVE_HIGH_TABLES==1
#define HIGH_TABLES_SIZE 64 // maximum size of high tables in KB
extern uint64_t high_tables_base, high_tables_size;
#endif
@@ -149,7 +149,7 @@ static void pci_domain_set_resources(device_t dev)
ram_resource(dev, idx++, 0, 640);
ram_resource(dev, idx++, 1024, tolmk - 1024);
-#if HAVE_HIGH_TABLES==1
+#if CONFIG_HAVE_HIGH_TABLES==1
/* Leave some space for ACPI, PIRQ and MP tables */
high_tables_base = (tomk - HIGH_TABLES_SIZE) * 1024;
high_tables_size = HIGH_TABLES_SIZE * 1024;
diff --git a/src/northbridge/intel/i855gme/Config.lb b/src/northbridge/intel/i855gme/Config.lb
index 83edd47783..04634806ab 100644
--- a/src/northbridge/intel/i855gme/Config.lb
+++ b/src/northbridge/intel/i855gme/Config.lb
@@ -18,10 +18,10 @@
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
-uses HAVE_HIGH_TABLES
+uses CONFIG_HAVE_HIGH_TABLES
config chip.h
object northbridge.o
-default HAVE_HIGH_TABLES=1
+default CONFIG_HAVE_HIGH_TABLES=1
diff --git a/src/northbridge/intel/i855gme/northbridge.c b/src/northbridge/intel/i855gme/northbridge.c
index ec42c6eb73..ad48ee11de 100644
--- a/src/northbridge/intel/i855gme/northbridge.c
+++ b/src/northbridge/intel/i855gme/northbridge.c
@@ -88,7 +88,7 @@ static uint32_t find_pci_tolm(struct bus *bus)
return tolm;
}
-#if HAVE_HIGH_TABLES==1
+#if CONFIG_HAVE_HIGH_TABLES==1
#define HIGH_TABLES_SIZE 64 // maximum size of high tables in KB
extern uint64_t high_tables_base, high_tables_size;
#endif
@@ -147,7 +147,7 @@ static void pci_domain_set_resources(device_t dev)
/* ram_resource(dev, idx++, 1024, tolmk - 1024); */
ram_resource(dev, idx++, 768, tolmk - 768);
-#if HAVE_HIGH_TABLES==1
+#if CONFIG_HAVE_HIGH_TABLES==1
/* Leave some space for ACPI, PIRQ and MP tables */
high_tables_base = (tomk - HIGH_TABLES_SIZE) * 1024;
high_tables_size = HIGH_TABLES_SIZE * 1024;
diff --git a/src/northbridge/intel/i855pm/Config.lb b/src/northbridge/intel/i855pm/Config.lb
index 2a8095f692..72e903b9b1 100644
--- a/src/northbridge/intel/i855pm/Config.lb
+++ b/src/northbridge/intel/i855pm/Config.lb
@@ -1,7 +1,7 @@
-uses HAVE_HIGH_TABLES
+uses CONFIG_HAVE_HIGH_TABLES
config chip.h
object northbridge.o
-default HAVE_HIGH_TABLES=1
+default CONFIG_HAVE_HIGH_TABLES=1
diff --git a/src/northbridge/intel/i855pm/northbridge.c b/src/northbridge/intel/i855pm/northbridge.c
index 4fbd3b3cec..ce655a9f0d 100644
--- a/src/northbridge/intel/i855pm/northbridge.c
+++ b/src/northbridge/intel/i855pm/northbridge.c
@@ -66,7 +66,7 @@ static uint32_t find_pci_tolm(struct bus *bus)
return tolm;
}
-#if HAVE_HIGH_TABLES==1
+#if CONFIG_HAVE_HIGH_TABLES==1
#define HIGH_TABLES_SIZE 64 // maximum size of high tables in KB
extern uint64_t high_tables_base, high_tables_size;
#endif
@@ -114,7 +114,7 @@ static void pci_domain_set_resources(device_t dev)
ram_resource(dev, idx++, 0, 640);
ram_resource(dev, idx++, 768, tolmk - 768);
-#if HAVE_HIGH_TABLES==1
+#if CONFIG_HAVE_HIGH_TABLES==1
/* Leave some space for ACPI, PIRQ and MP tables */
high_tables_base = (tomk - HIGH_TABLES_SIZE) * 1024;
high_tables_size = HIGH_TABLES_SIZE * 1024;
diff --git a/src/northbridge/intel/i945/Config.lb b/src/northbridge/intel/i945/Config.lb
index 72f620e5ba..6b74fbe7c1 100644
--- a/src/northbridge/intel/i945/Config.lb
+++ b/src/northbridge/intel/i945/Config.lb
@@ -17,9 +17,9 @@
# Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
#
-uses HAVE_HIGH_TABLES
+uses CONFIG_HAVE_HIGH_TABLES
-default HAVE_HIGH_TABLES=1
+default CONFIG_HAVE_HIGH_TABLES=1
config chip.h
driver northbridge.o
diff --git a/src/northbridge/intel/i945/northbridge.c b/src/northbridge/intel/i945/northbridge.c
index 81fd58e07f..b0ddbda7e4 100644
--- a/src/northbridge/intel/i945/northbridge.c
+++ b/src/northbridge/intel/i945/northbridge.c
@@ -93,7 +93,7 @@ static uint32_t find_pci_tolm(struct bus *bus)
return tolm;
}
-#if HAVE_HIGH_TABLES==1
+#if CONFIG_HAVE_HIGH_TABLES==1
#define HIGH_TABLES_SIZE 64 // maximum size of high tables in KB
extern uint64_t high_tables_base, high_tables_size;
#endif
@@ -177,7 +177,7 @@ static void pci_domain_set_resources(device_t dev)
assign_resources(&dev->link[0]);
-#if HAVE_HIGH_TABLES==1
+#if CONFIG_HAVE_HIGH_TABLES==1
/* Leave some space for ACPI, PIRQ and MP tables */
high_tables_base = (tomk - HIGH_TABLES_SIZE) * 1024;
high_tables_size = HIGH_TABLES_SIZE * 1024;
@@ -199,7 +199,7 @@ static struct device_operations pci_domain_ops = {
.enable_resources = enable_childrens_resources,
.init = 0,
.scan_bus = pci_domain_scan_bus,
-#if MMCONF_SUPPORT_DEFAULT
+#if CONFIG_MMCONF_SUPPORT_DEFAULT
.ops_pci_bus = &pci_ops_mmconf,
#else
.ops_pci_bus = &pci_cf8_conf1,
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-26 10:03:43 +0000