diff options
| author | Elyes HAOUAS <ehaouas@noos.fr> | 2020-09-15 08:42:17 +0200 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2020-10-26 06:44:40 +0000 |
| commit | 92f46aaac7104c62ab3956dc32af5ccbddc944f1 (patch) | |
| tree | 39fc9cab1ca29fb2fcf6f5ae136384f56e23dff5 /src/northbridge/intel | |
| parent | f209b18df3b66d78a9838787182d40fc72eee010 (diff) | |
src: Include <arch/io.h> when appropriate
Change-Id: I4077b9dfeeb2a9126c35bbdd3d14c52e55a5e87c
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/45404
Reviewed-by: Frans Hendriks <fhendriks@eltan.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/northbridge/intel')
| -rw-r--r-- | src/northbridge/intel/i945/early_init.c | 1 | ||||
| -rw-r--r-- | src/northbridge/intel/ironlake/romstage.c | 1 |
2 files changed, 1 insertions, 1 deletions
diff --git a/src/northbridge/intel/i945/early_init.c b/src/northbridge/intel/i945/early_init.c index b04a2f5940..dea4f9b72b 100644 --- a/src/northbridge/intel/i945/early_init.c +++ b/src/northbridge/intel/i945/early_init.c @@ -1,6 +1,5 @@ /* SPDX-License-Identifier: GPL-2.0-only */ -#include <arch/io.h> #include <cbmem.h> #include <cf9_reset.h> #include <console/console.h> diff --git a/src/northbridge/intel/ironlake/romstage.c b/src/northbridge/intel/ironlake/romstage.c index e5ecafe2a2..6b9f3d0e83 100644 --- a/src/northbridge/intel/ironlake/romstage.c +++ b/src/northbridge/intel/ironlake/romstage.c @@ -1,5 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0-only */ +#include <arch/io.h> #include <stdint.h> #include <console/console.h> #include <cf9_reset.h> |